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參數(shù)資料
| 型號(hào)： | 933438800602 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | ADDR LATCH BASED PRPHL DRVR, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, SOT38-4, DIP-16 |
| 文件頁(yè)數(shù)： | 2/7頁(yè) |
| 文件大小： | 85K |
| 代理商： | 933438800602 |
Philips Semiconductors
Product data
NE590
Addressable peripheral driver
2
2001 Aug 03
853-0951 26836
DESCRIPTION
The NE590 addressable peripheral driver is a high current latched
driver, similar in function to the 9334 address decoder. The device
has eight Darlington power outputs, each capable of 250 mA load
current. The outputs are turned on or off by respectively loading a
logic HIGH or logic LOW into the device data input. The required
output is defined by a 3-bit address. The device must be enabled by
a CE input line. A common clear input, CLR, turns all outputs off
when a logic LOW is applied.
The NE590 has eight open-collector Darlington outputs which sink
current to ground. The device is packaged in a 16-pin plastic DIP
package.
FEATURES
8 high current outputs
Low-loading bus compatible inputs
Power-on clear ensures safe operation
NE590 will operate in addressable or demultiplex mode
Allows random (addressed) data entry
Easily expandable
NE590 is pin compatible with 54/74LS259
APPLICATIONS
Relay driver
Indicator lamp driver
Triac trigger
LED display digit driver
Stepper motor driver
PIN CONFIGURATIONS
N Package
NE590
1
2
3
4
5
6
7
8
9
10
11
12
13
14
16
15
TOP VIEW
A0
A1
A2
Q0
Q1
Q2
Q3
GND
VCC
CLR
CE
D
Q7
Q6
Q5
Q4
SL00479
Figure 1. Pin Configuration
PIN DESCRIPTION
PIN
SYMBOL
NAME & FUNCTION
1-3
A0-A2
A 3-bit binary address on these pins
defines which of the 8 output latches is to
receive the data.
4-7,
9-12
Q0-Q7
The 8 device outputs. The NE590 has
open-collector Darlington outputs.
13
D
The data input. When the chip is
enabled, this data bit is transferred to the
defined output such that:
“1” turns output switch “ON”
“0” turns output switch “OFF”
Thus in logic terms, the NE590 inverts
data to the relevant output.
14
CE
The chip enable. When this input is LOW,
the output latches will accept data. When
CE goes HIGH, all outputs will retain their
existing state regardless of address or
data input conditions.
15
CLR
The clear input. When CLR goes LOW all
output switches are turned “OFF”.
A HIGH data input will override the clear
function on the addressed latch.
ORDERING INFORMATION
DESCRIPTION
TEMPERATURE RANGE
ORDER CODE
DWG #
16-Pin Plastic Dual In-Line Package (DIP)
0
°C to +70 °C
NE590N
SOT38-4
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