參數(shù)資料
型號: 933669760652
廠商: NXP SEMICONDUCTORS
元件分類: 多路復(fù)用及模擬開關(guān)
英文描述: TRIPLE 2-CHANNEL, SGL ENDED MULTIPLEXER, PDIP16
封裝: SOT-38-1, DIP16
文件頁數(shù): 8/22頁
文件大?。?/td> 217K
代理商: 933669760652
December 1990
16
Philips Semiconductors
Product specication
Triple 2-channel analog
multiplexer/demultiplexer
74HC/HCT4053
TEST CIRCUIT AND WAVEFORMS
Fig.20 Test circuit for measuring AC performance.
Conditions
TEST
SWITCH
VIS
tPZH
tPZL
tPHZ
tPLZ
others
VEE
VCC
VEE
VCC
open
VCC
VEE
VCC
VEE
pulse
FAMILY
AMPLITUDE
VM
tr; tf
fmax;
PULSE WIDTH
OTHER
74HC
VCC
50%
<2 ns
6 ns
74HCT
3.0 V
1.3 V
<2 ns
6 ns
CL = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values).
RT = termination resistance should be equal to the output impedance ZO of the pulse generator.
tr =tf = 6 ns; when measuring fmax, there is no constraint to tr, tf with 50% duty factor.
Fig.21 Input pulse definitions.
Conditions
TEST
SWITCH
VIS
tPZH
tPZL
tPHZ
tPLZ
others
VEE
VCC
VEE
VCC
open
VCC
VEE
VCC
VEE
pulse
FAMILY
AMPLITUDE
VM
tr; tf
fmax;
PULSE WIDTH
OTHER
74HC
VCC
50%
<2 ns
6 ns
74HCT
3.0 V
1.3 V
<2 ns
6 ns
CL = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values).
RT = termination resistance should be equal to the output impedance ZO of the pulse generator.
tr =tf = 6 ns; when measuring fmax, there is no constraint to tr, tf with 50% duty factor.
相關(guān)PDF資料
PDF描述
933670390112 TRIPLE 2-CHANNEL, SGL ENDED MULTIPLEXER, PDIP16
935166800112 TRIPLE 2-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16
935186940112 TRIPLE 2-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16
935186940118 TRIPLE 2-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16
933714840653 TRIPLE 2-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16
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