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參數(shù)資料
| 型號： | 933669770652 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 計數(shù)器 |
| 英文描述： | HC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 14-BIT UP BINARY COUNTER, PDIP16 |
| 封裝： | SOT-38-1, DIP-16 |
| 文件頁數(shù)： | 15/16頁 |
| 文件大?。?/td> | 167K |
| 代理商： | 933669770652 |
December 1990
8
Philips Semiconductors
Product specication
14-stage binary ripple counter with oscillator
74HC/HCT4060
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr =tf = 6 ns; CL = 50 pF
SYMBOL
PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HC
VCC
(V)
WAVEFORMS
+25
40 to +85
40 to +125
min.
typ.
max.
min.
max.
min.
max.
tPHL/ tPLH
propagation delay
RS to Q3
99
36
29
300
60
51
375
75
64
450
90
77
ns
2.0
4.5
6.0
Fig.12
tPHL/ tPLH
propagation delay
Qn to Qn+1
22
8
6
80
16
14
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.14
tPHL
propagation delay
MR to Qn
55
20
16
175
35
30
220
44
37
265
53
45
ns
2.0
4.5
6.0
Fig.13
tTHL/ tTLH
output transition time
19
7
6
75
15
13
95
19
16
110
22
19
ns
2.0
4.5
6.0
Fig.12
tW
clock pulse width
RS; HIGH or LOW
80
16
14
17
6
5
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.12
tW
master reset pulse
width MR; HIGH
80
16
14
25
9
7
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.13
trem
removal time
MR to RS
100
20
17
28
10
8
125
25
21
150
30
26
ns
2.0
4.5
6.0
Fig.13
fmax
maximum clock pulse
frequency
6.0
30
35
26
80
95
4.8
24
28
4.0
20
24
MHz
2.0
4.5
6.0
Fig.12
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