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參數(shù)資料
| 型號(hào)： | 933669780652 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 計(jì)數(shù)移位寄存器 |
| 英文描述： | HC/UH SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16 |
| 封裝： | SOT-38-1, DIP-16 |
| 文件頁(yè)數(shù)： | 7/10頁(yè) |
| 文件大小： | 69K |
| 代理商： | 933669780652 |
December 1990
6
Philips Semiconductors
Product specication
8-stage shift-and-store bus register
74HC/HCT4094
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
SYMBOL PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HC
VCC
(V)
WAVEFORMS
+25
40 to +85 40 to +125
min. typ. max. min. max. min.
max.
tPHL/ tPLH propagation delay
CP to QS1
50
18
14
150
30
26
190
38
33
225
45
38
ns
2.0
4.5
6.0
Fig.7
tPHL/ tPLH propagation delay
CP to QS2
44
16
13
135
27
23
170
34
29
205
41
35
ns
2.0
4.5
6.0
Fig.7
tPHL/ tPLH propagation delay
CP to QPn
63
23
18
195
39
33
245
49
42
295
59
50
ns
2.0
4.5
6.0
Fig.7
tPHL/ tPLH propagation delay
STR to QPn
58
21
17
180
36
31
225
45
38
270
54
46
ns
2.0
4.5
6.0
Fig.8
tPZH/ tPZL
3-state output enable time
OE to QPn
55
20
16
175
35
30
220
44
37
265
53
45
ns
2.0
4.5
6.0
Fig.9
tPHZ/ tPLZ
3-state output disable
time OE to QPn
41
15
12
125
25
21
155
31
26
190
38
32
ns
2.0
4.5
6.0
Fig.9
tTHL/ tTLH
output transition time
19
7
6
75
15
13
95
19
16
110
22
19
ns
2.0
4.5
Fig.7
tW
clock pulse width
HIGH or LOW
80
16
14
5
4
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.7
tW
strobe pulse width
HIGH
80
16
14
5
4
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.8
tsu
set-up time
D to CP
50
10
9
14
5
4
65
13
11
75
15
13
ns
2.0
4.5
6.0
Fig.10
tsu
set-up time
CP to STR
100
20
17
28
10
8
125
25
21
150
30
26
ns
2.0
4.5
6.0
Fig.8
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