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參數(shù)資料
| 型號(hào)： | 933669950652 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 編、解碼器及復(fù)用、解復(fù)用 |
| 英文描述： | HCT SERIES, 8 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PDIP16 |
| 封裝： | DIP-16 |
| 文件頁(yè)數(shù)： | 2/7頁(yè) |
| 文件大?。?/td> | 46K |
| 代理商： | 933669950652 |
December 1990
2
Philips Semiconductors
Product specication
8-input multiplexer
74HC/HCT151
FEATURES
True and complement outputs
Multifunction capability
Permits multiplexing from n lines to 1 line
Non-inverting data path
See the “251” for the 3-state version
Output capability: standard
ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT151 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25 °C; tr =tf = 6 ns
Notes
1. CPD is used to determine the dynamic power dissipation (PD in W):
PD =CPD × VCC2 × fi +∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
tPHL/ tPLH
propagation delay
CL = 15 pF; VCC =5 V
In to Y, Y
1719ns
Sn to Y, Y
1920ns
E to Y
1213ns
E to Y
1418ns
CI
input capacitance
3.5
pF
CPD
power dissipation capacitance per package
notes 1 and 2
40
pF
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