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參數(shù)資料
| 型號(hào)： | 933713440652 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | HC/UH SERIES, OCTAL 1-BIT DRIVER, INVERTED OUTPUT, PDSO20 |
| 封裝： | PLASTIC, SO-20 |
| 文件頁數(shù)： | 2/7頁 |
| 文件大?。?/td> | 44K |
| 代理商： | 933713440652 |
December 1990
2
Philips Semiconductors
Product specication
Octal buffer/line driver; 3-state;
inverting
74HC/HCT240
FEATURES
Output capability: bus driver
ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT240 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT240 are octal inverting buffer/line drivers
with 3-state outputs. The 3-state outputs are controlled by
the output enable inputs 1OE and 2OE. A HIGH on nOE
causes the outputs to assume a high impedance
OFF-state. The “240” is identical to the “244” but has
inverting outputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25 °C; tr =tf = 6 ns
Notes
1. CPD is used to determine the dynamic power dissipation (PD in W):
PD =CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
tPHL/ tPLH
propagation delay
1An to 1Yn;
2An to 2Yn
CL = 15 pF; VCC = 5 V
99ns
CI
input capacitance
3.5
pF
CPD
power dissipation capacitance per buffer
notes 1 and 2
30
pF
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