參數(shù)資料
型號(hào)： 933714000653
廠商： NXP SEMICONDUCTORS
元件分類： 門電路
英文描述： HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO14
封裝： SO-14
文件頁(yè)數(shù)： 4/7頁(yè)
文件大小： 63K
代理商： 933714000653
Philips Semiconductors
Product specification
74F37
Quad 2-input NAND buffer
May 24, 1990
4
AC ELECTRICAL CHARACTERISTICS
LIMITS
TEST
VCC = +5.0V
VCC = +5.0V ± 10%
SYMBOL
PARAMETER
TEST
CONDITION
Tamb = +25°C
Tamb = 0°C to +70°C
UNIT
CONDITION
CL = 50pF, RL = 500
MIN
TYP
MAX
MIN
MAX
tPLH
tPHL
Propagation delay
Dna, Dnb to Qn
Waveform 1
2.5
1.5
3.5
2.5
5.5
4.5
2.0
1.5
6.5
5.0
ns
AC WAVEFORMS
VM
Qn
Dna, Dnb
tPHL
tPLH
SF00005
Waveform 1.
Propagation Delay for Inverting Outputs
NOTE:
For all waveforms, VM = 1.5V.
TEST CIRCUIT AND WAVEFORMS
tw
90%
VM
10%
90%
VM
10%
90%
VM
10%
90%
VM
10%
NEGATIVE
PULSE
POSITIVE
PULSE
tw
AMP (V)
0V
tTHL (tf )
INPUT PULSE REQUIREMENTS
rep. rate
tw
tTLH
tTHL
1MHz
500ns
2.5ns
Input Pulse Definition
VCC
family
74F
D.U.T.
PULSE
GENERATOR
RL
CL
RT
VIN
VOUT
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
RL = Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
CL = Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
tTHL (tf )
tTLH (tr )
AMP (V)
amplitude
3.0V
1.5V
VM
SF00006
相關(guān)PDF資料
PDF描述
933839590005 HC/UH SERIES, HEX 1-INPUT INVERT GATE, UUC
935187580112 HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO14
933669010652 HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDIP14
935187580118 HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO14
0558-5999-14 HIGH SPEED LAN MAGNETICS
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