參數(shù)資料
型號(hào)： 933715380112
廠商： NXP SEMICONDUCTORS
元件分類： 計(jì)數(shù)器
英文描述： HCT SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO16
封裝： PLASTIC, SOT-109, SO-16
文件頁數(shù)： 4/7頁
文件大?。?/td> 53K
代理商： 933715380112
January 1995
4
Philips Semiconductors
Product specication
1-to-64 bit variable length shift register
HEF4557B
LSI
FUNCTION TABLE
INPUTS
OUTPUT
MR
A/BDA
DB
CPO
CP1
O (1)
LL
D1
D2
LD2
LH
D1
D2
LD1
LL
D1
D2
HD2
LH
D1
D2
HD1
HX
X
L
Notes
1. The moment Dn appears at O depends on the
bit-length shown in the table below.
2. H = HIGH state (the more positive voltage)
3. L = LOW state (the less positive voltage)
4. X = state is immaterial
5.
= positive-going transition
6.
= negative-going transition
7. Dn = either HIGH or LOW
BIT-LENGTH SELECT FUNCTION TABLE
AC CHARACTERISTICS
VSS = 0 V; Tamb =25 °C; input transition times ≤ 20 ns
L32
L16
L8
L4
L2
L1
REGISTER LENGTH
L
LLLLL
1-bit
L
LLLL
H
2-bits
L
H
L
3-bits
L
H
4-bits
L
H
L
5-bits
L
H
L
H
6-bits
L
H
L
7-bits
L
H
8-bits
↓
↓↓↓↓↓
↓
L
HHHHH
32-bits
H
LLLLL
33-bits
H
LLLL
H
34-bits
↓
↓↓↓↓↓
↓
H
L
61-bits
H
L
H
62-bits
H
HHHH
L
63-bits
H
HHHHH
64-bits
VDD
V
TYPICAL FORMULA FOR P (
W)
Dynamic power
5
3 500 fi +∑ (foCL) × VDD2
where
dissipation per
10
15 000 fi +∑ (foCL) × VDD2
fi = input freq. (MHz)
package (P)
15
37 000 fi +∑ (foCL) × VDD2
fo = output freq. (MHz)
CL = load capacitance (pF)
∑ (foCL) = sum of outputs
VDD = supply voltage (V)
相關(guān)PDF資料
PDF描述
933714900112 HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO16
935189130112 HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO16
933825400005 HCT SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, UUC
935188750112 HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO16
935190110118 HCT SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO16
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