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參數(shù)資料
| 型號(hào)： | 933757330653 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 計(jì)數(shù)移位寄存器 |
| 英文描述： | HC/UH SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
| 封裝： | SOT-109-1, SO-16 |
| 文件頁(yè)數(shù)： | 10/12頁(yè) |
| 文件大小： | 80K |
| 代理商： | 933757330653 |
December 1990
7
Philips Semiconductors
Product specication
8-bit shift register with input ip-ops
74HC/HCT597
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr =tf = 6 ns; CL =50pF
SYMBOL
PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HC
VCC
(V)
WAVEFORMS
+25
40 to +85 40 to +125
min.
typ.
max. min. max. min.
max.
tPHL/ tPLH
propagation delay
SHCP to Q
55
20
16
175
35
30
220
44
37
265
53
45
ns
2.0
4.5
6.0
Fig.7
tPHL
propagation delay
MR to Q
58
21
17
175
35
30
220
44
37
265
53
45
ns
2.0
4.5
6.0
Fig.8
tPHL/ tPLH
propagation delay
STCP to Q
80
29
23
250
50
43
315
63
54
375
75
64
ns
2.0
4.5
6.0
Fig.7
tPHL/ tPLH
propagation delay
PL to Q
69
25
20
215
43
37
270
54
46
325
65
55
ns
2.0
4.5
6.0
Fig.9
tTHL/ tTLH
output transition time
19
7
6
75
15
13
95
19
16
110
22
19
ns
2.0
4.5
6.0
Fig.9
tW
STCP pulse width
HIGH or LOW
80
16
14
11
4
3
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.7
tW
SHCP pulse width
HIGH or LOW
80
16
14
5
4
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.7
tW
MR pulse width
LOW
80
16
14
22
8
6
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.8
tW
PL pulse width
LOW
80
16
14
22
8
6
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.9
trem
removal time
MR to SHCP
60
12
10
3
1
75
15
13
90
18
15
ns
2.0
4.5
6.0
Fig.10
tsu
set-up time
Dn to STCP
60
12
10
8
3
2
75
15
13
90
18
15
ns
2.0
4.5
6.0
Fig.11
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