Philips Semiconductors - PIP - 74HC/HCT4351; 8-channel analog multiplexer/demultiplexer with latch
74HC/HCT4351; 8-
channel analog
multiplexer/demultiplexer
with latch
Information as of 2003-04-22
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Applications
Block diagram
The 74HC/HCT4351 are high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT4351 are 8-channel analog multiplexers/demultiplexers with three select inputs (S0 to S2), two enable inputs
(E1 and E2), a latch enable input (LE), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z).
With E1 LOW and E2 is HIGH, one of the eight switches is selected (low impedance ON-state) by S0 to S2. The data at the
select inputs may be latched by using the active LOW latch enable input (LE). When LE is HIGH the latch is transparent.
When either of the two enable inputs, E1 (active LOW) and E2 (active HIGH), is inactive, all 8 analog switches are turned
off.
VCC and GND are the supply voltage pins for the digital control inputs (S0 to S2, LE, E1 and E2). The VCC to GND ranges
are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The analog inputs/outputs (Y0 to Y7, and Z) can swing between VCC as a
positive limit and VEE as a negative limit.
VCC - VEE may not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground).
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Wide analog input voltage range: ± 5 V
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Low 'ON' resistance:
80
(typ.) at V
CC - VEE = 4.5 V
70
(typ.) at V
CC - VEE = 6.0 V
60
(typ.) at V
CC - VEE = 9.0 V
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Logic level translation: to enable 5 V logic to communicate with ± 5 V analog signals
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Typical 'break before make' built in
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Address latches provided
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Output capability: non-standard
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ICC category: MSI
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