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參數(shù)資料
| 型號(hào)： | 933778010602 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 算術(shù)邏輯單元 |
| 英文描述： | F/FAST SERIES, 4-BIT MAGNITUDE COMPARATOR, TRUE OUTPUT, PDSO16 |
| 封裝： | 7.50 MM, PLASTIC, MS-013AA, SOT-162-1, SO-16 |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 86K |
| 代理商： | 933778010602 |
Philips Semiconductors
Product specification
74F85
4-bit magnitude comparator
September 27, 1994
4
APPLICATION
B23
A23
B22
A22
B21
A21
B20
A20
B19
L
A19
INPUTS
(LSB)
B3
A3
B2
A2
B1
A1
B0
A0
IA<B
IA=B
IA>B
A<B
A=B
A>B
NC
B18
A18
B17
A17
B16
A16
B15
A15
B14
L
A14
B3
A3
B2
A2
B1
A1
B0
A0
IA<B
IA=B
IA>B
A<B
A=B
A>B
NC
B13
A13
B12
A12
B11
A11
B10
A10
B9
L
A9
B3
A3
B2
A2
B1
A1
B0
A0
IA<B
IA=B
IA>B
A<B
A=B
A>B
NC
B8
A8
B7
A7
B6
A6
B5
A5
B4
L
A4
B3
A3
B2
A2
B1
A1
B0
A0
IA<B
IA=B
IA>B
A<B
A=B
A>B
NC
B3
A3
B2
A2
B1
A1
B0
A0
H
(LSB)
B3
A3
B2
A2
B1
A1
B0
A0
IA<B
IA=B
IA>B
A<B
A=B
A>B
B3
A3
B2
A2
B1
A1
B0
A0
A<B
A=B
A>B
A<B
A=B
A>B
OUTPUTS
L
SF00079
Figure 1. Comparison of Two 24-Bit Words
The parallel expansion scheme shown in Figure 1 demonstrates the
most efficient general use of these comparators. The expansion
inputs can be used as a fifth input bit position except on the least
significant device, which must be connected as in the serial scheme.
The expansion inputs used by labeling IA>B as an “A” input, IA<B as
a “B” input and setting IA=B = Low. The 74F85 can be used as a 5-bit
comparator only when the outputs are used to drive the (A0–A3) and
(B0–B3) inputs of another 74F85 device. The parallel technique can
be expanded to any number of bits as shown in Table 1.
Table 1.
WORD LENGTH
NUMBER OF
PACKAGES
TYPICAL SPEEDS
74F
1–4 bits
1
12ns
5–24 bits
2–6
22ns
25–120 bits
8–31
34ns
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