參數(shù)資料
型號： 933865300118
廠商： NXP SEMICONDUCTORS
元件分類： 顯示驅(qū)動器
英文描述： LIQUID CRYSTAL DISPLAY DRIVER, PDSO40
封裝： PLASTIC, SOT-158-1, VSOP-40
文件頁數(shù)： 20/40頁
文件大?。?/td> 243K
代理商： 933865300118
1998 May 04
27
Philips Semiconductors
Product specication
Universal LCD driver for low multiplex
rates
PCF8566
11 AC CHARACTERISTICS
VSS =0V; VDD = 2.5 to 6 V; VLCD =VDD 2.5 to VDD 6 V; Tamb = 40 to +85 °C; unless otherwise specied; note 1.
Notes
1. All timing values referred to VIH and VIL levels with an input voltage swing of VSS to VDD.
2. At fCLK < 125 kHz, I2C-bus maximum transmission speed is derated.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
fCLK
oscillator frequency (normal mode)
VDD = 5 V; note 2
125
200
315
kHz
fCLKLP
oscillator frequency (power saving
mode)
VDD = 3.5 V
21
31
48
kHz
tCLKH
CLK HIGH time
1
s
tCLKL
CLK LOW time
1
s
tPSYNC
SYNC propagation delay
400
ns
tSYNCL
SYNC LOW time
1
s
tPLCD
driver delays with test loads
VLCD =VDD 5V
30
s
I2C-bus
tBUF
bus free time
4.7
s
tHD; STA
START condition hold time
4
s
tLOW
SCL LOW time
4.7
s
tHIGH
SCL HIGH time
4
s
tSU; STA
START condition set-up time
(repeated start code only)
4.7
s
tHD; DAT
data hold time
0
s
tSU; DAT
data set-up time
250
ns
tr
rise time
1
s
tf
fall time
300
ns
tSU; STO
STOP condition set-up time
4.7
s
Fig.19 Test loads.
handbook, full pagewidth
MGG387
3.3 k
1.5 k
6.8 k
(2%)
CLK
(pin 4)
SDA, SCL
(pins 1, 2)
SYNC
(pin 3)
0.5VDD
VDD
S0 to S23
(pins 17 to 40)
Iload ≈ 15 A
Iload ≈ 25 A
BP0 to BP3
(pins 13 to 16)
相關(guān)PDF資料
PDF描述
933865310112 LIQUID CRYSTAL DISPLAY DRIVER, PDIP40
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933876860602 F/FAST SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP16
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