參數(shù)資料
型號: 934055221118
廠商: NXP SEMICONDUCTORS
元件分類: JFETs
英文描述: 69 A, 25 V, 0.014 ohm, N-CHANNEL, Si, POWER, MOSFET
封裝: PLASTIC, DPAK-3
文件頁數(shù): 7/14頁
文件大?。?/td> 145K
代理商: 934055221118
Philips Semiconductors
Product specification
N-channel TrenchMOS
transistor
PHP69N03LT, PHB69N03LTT
Logic level FET
PHD69N03LT
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
R
th j-mb
Thermal resistance junction
-
1.2
K/W
to mounting base
R
th j-a
Thermal resistance junction
SOT78 package, in free air
-
60
-
K/W
to ambient
SOT404 and SOT428 packages, pcb
-
50
-
K/W
mounted, minimum footprint
AVALANCHE LIMITING VALUE
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
W
DSS
Drain-source non-repetitive
I
D = 25 A; VDD ≤ 15 V;
-
60
mJ
unclamped inductive turn-off
V
GS = 5 V; RGS = 50 ; Tmb = 25 C
energy
ELECTRICAL CHARACTERISTICS
T
j= 25C
unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
V
(BR)DSS
Drain-source breakdown
V
GS = 0 V; ID = 0.25 mA;
25
-
V
voltage
T
j = -55C
22
-
V
GS(TO)
Gate threshold voltage
V
DS = VGS; ID = 1 mA
1
1.5
2
V
T
j = 175C
0.5
-
V
T
j = -55C
-
2.3
V
R
DS(ON)
Drain-source on-state
V
GS = 10 V; ID = 25 A
-
8.5
12
m
resistance
V
GS = 5 V; ID = 25 A
-
11
14
m
V
GS = 5 V; ID = 25 A; Tj = 175C
-
26
m
g
fs
Forward transconductance
V
DS = 25 V; ID = 25 A
12
40
-
S
I
GSS
Gate source leakage current V
GS = ±5 V; VDS = 0 V
-
10
100
nA
I
DSS
Zero gate voltage drain
V
DS = 25 V; VGS = 0 V;
-
0.05
10
A
current
T
j = 175C
-
500
A
Q
g(tot)
Total gate charge
I
D = 69 A; VDD = 15 V; VGS = 5 V
-
26
-
nC
Q
gs
Gate-source charge
-
7.6
-
nC
Q
gd
Gate-drain (Miller) charge
-
11
-
nC
t
d on
Turn-on delay time
V
DD = 15 V; ID = 25 A;
-
7
15
ns
t
r
Turn-on rise time
V
GS = 10 V; RG = 5
-50
75
ns
t
d off
Turn-off delay time
Resistive load
-
82
120
ns
t
f
Turn-off fall time
-
59
75
ns
L
d
Internal drain inductance
Measured tab to centre of die
-
3.5
-
nH
L
d
Internal drain inductance
Measured from drain lead to centre of die
-
4.5
-
nH
(SOT78 package only)
L
s
Internal source inductance
Measured from source lead to source
-
7.5
-
nH
bond pad
C
iss
Input capacitance
V
GS = 0 V; VDS = 20 V; f = 1 MHz
-
1700
-
pF
C
oss
Output capacitance
-
475
-
pF
C
rss
Feedback capacitance
-
300
-
pF
October 1999
2
Rev 1.600
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