Philips Semiconductors
Product specification
Logic level TOPFET
BUK128-50DL
SMD version of BUK117-50DL
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DS
Continuous drain source voltage
1
-
50
V
I
D
Continuous drain current
V
IS = 5 V; Tmb = 25 C
-
self -
A
limited
I
D
Continuous drain current
V
IS = 5 V; Tmb
≤ 110 C
-
8
A
I
Continuous input current
-
-5
5
mA
I
IRM
Non-repetitive peak input current
t
p
≤ 1 ms
-10
10
mA
P
D
Total power dissipation
T
mb
≤ 25 C
-
40
W
T
stg
Storage temperature
-
-55
175
C
T
j
Continuous junction temperature
2
normal operation
-
150
C
T
sold
Case temperature
during soldering
-
260
C
ESD LIMITING VALUE
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
C
Electrostatic discharge capacitor
Human body model;
-
2
kV
voltage
C = 250 pF; R = 1.5 k
OVERVOLTAGE CLAMPING LIMITING VALUES
At a drain source voltage above 50 V the power MOSFET is actively turned on to clamp overvoltage transients.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
Inductive load turn-off
I
DM = 8 A; VDD
≤ 20 V
E
DSM
Non-repetitive clamping energy
T
mb
≤ 25 C
-
100
mJ
E
DRM
Repetitive clamping energy
T
mb
≤ 95 C; f = 250 Hz
-
20
mJ
OVERLOAD PROTECTION LIMITING VALUE
With an adequate protection supply provided via the input pin, TOPFET can protect itself from two types of overload
- overtemperature and short circuit load.
SYMBOL
PARAMETER
REQUIRED CONDITION
MIN.
MAX.
UNIT
V
DS
Drain source voltage
3
4 V
≤ V
IS
≤ 5.5 V
0
35
V
THERMAL CHARACTERISTIC
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Thermal resistance
R
th j-mb
Junction to mounting base
-
2.5
3.1
K/W
R
th j-a
Junction to ambient
minimum footprint FR4 PCB
-
50
-
K/W
1 Prior to the onset of overvoltage clamping. For voltages above this value, safe operation is limited by the overvoltage clamping energy.
2 A higher T
j is allowed as an overload condition but at the threshold Tj(TO) the over temperature trip operates to protect the switch.
3 All control logic and protection functions are disabled during conduction of the source drain diode.
May 2001
2
Rev 1.800