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參數(shù)資料
| 型號： | 934056919118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | 65 A BUF OR INV BASED PRPHL DRVR, PSSO4 |
| 封裝： | PLASTIC, SOT-426, D2PAK-5 |
| 文件頁數(shù)： | 7/7頁 |
| 文件大?。?/td> | 46K |
| 代理商： | 934056919118 |
December 1990
7
Philips Semiconductors
Product specication
9-bit odd/even parity generator/checker
74HC/HCT280
AC WAVEFORMS
APPLICATION INFORMATION
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”.
Fig.6
Waveforms showing the data input (In) to parity outputs (∑E, ∑O) propagation delays and the output
transition time.
(1) HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.7 Cascaded 17-bit odd/even parity generator/checker.
For a single-chip 16-bit even/odd parity
generator/checker, see PC74HC/HCT7080.
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