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參數(shù)資料
| 型號： | 935008210602 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | F/FAST SERIES, OCTAL 1-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDIP24 |
| 封裝： | 0.300 INCH, PLASTIC, MS-001, SOT-222-1, DIP-24 |
| 文件頁數(shù)： | 14/14頁 |
| 文件大?。?/td> | 159K |
| 代理商： | 935008210602 |
Philips Semiconductors
Product data
74F646A/74F648A
Transceivers/registers
2003 Feb 04
9
AC ELECTRICAL CHARACTERISTICS FOR 74F648A
LIMITS
Tamb = +25°C
Tamb = 0°C to +70°C
SYMBOL
PARAMETER
TEST CONDITION
VCC = +5.0 V
VCC = +5.0 V ± 10%
UNIT
CL = 50 pF, RL = 500
MIN
TYP
MAX
MIN
MAX
fmax
Maximum clock frequency
Waveform 1
160
185
135
ns
tPLH
tPHL
Propagation delay
CPAB or CPBA to An or Bn
Waveform 1
5.0
5.5
7.0
7.5
9.5
10.0
4.5
10.5
ns
tPLH
tPHL
Propagation delay
An to Bn or Bn to An
Waveform 3
2.5
4.0
4.5
6.0
7.5
8.5
2.0
4.0
8.5
9.5
ns
tPLH
tPHL
Propagation delay
SAB or SBA to An or Bn
Waveform 2, 3
4.0
4.5
7.0
9.5
3.5
4.5
11.5
10.0
ns
tPZH
tPZL
Output enable time
OE to An or Bn
Waveform 5
Waveform 6
3.5
4.5
6.5
10.0
3.5
4.0
11.0
11.5
ns
tPZH
tPZL
Output enable time
DIR to An or Bn
Waveform 5
Waveform 6
3.5
4.0
5.5
6.5
8.5
9.5
3.0
4.0
9.0
10.0
ns
tPHZ
tPLZ
Output disable time
OE to An or Bn
Waveform 5
Waveform 6
2.5
4.0
6.5
9.0
2.0
3.5
8.0
10.0
ns
tPHZ
tPLZ
Output disable time
DIR to An or Bn
Waveform 5
Waveform 6
2.5
5.0
8.5
8.0
2.0
3.5
9.0
ns
AC SET-UP REQUIREMENTS FOR 74F648A
LIMITS
Tamb = +25 °C
Tamb = 0 °C to +70 °C
SYMBOL
PARAMETER
TEST CONDITION
VCC = +5.0 V
VCC = +5.0 V ± 10%
UNIT
CL = 50 pF, RL = 500
MIN
TYP
MAX
MIN
MAX
tsu (H)
tsu (L)
Set-up time, HIGH or LOW
An or Bn to CPAB or CPBA
Waveform 4
4.0
4.5
ns
th (H)
th (L)
Hold time, HIGH or LOW
An or Bn to CPAB or CPBA
Waveform 4
0
ns
tw (H)
tw (L)
Pulse width, HIGH or LOW
CPAB or CPBA
Waveform 1
3.5
4.0
3.5
ns
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