參數(shù)資料
型號(hào)： 935031360623
廠商： NXP SEMICONDUCTORS
元件分類： 總線收發(fā)器
英文描述： F/FAST SERIES, OCTAL 1-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24
封裝： 7.50 MM, PLASTIC, MS-013AD, SOT-137-1, SO-24
文件頁(yè)數(shù)： 13/14頁(yè)
文件大?。?/td> 168K
代理商： 935031360623
Philips Semiconductors
Product specification
74F651A/74F652A
Transceivers/registers
1999 Jun 23
8
AC ELECTRICAL CHARACTERISTICS FOR 74F651A
LIMITS
Tamb = +25°C
Tamb = 0°C to +70°C
SYMBOL
PARAMETER
TEST CONDITION
VCC = +5.0V
VCC = +5.0V ± 10%
UNIT
CL = 50pF, RL = 500
MIN
TYP
MAX
MIN
MAX
fmax
Maximum clock frequency
Waveform 1
155
175
140
ns
tPLH
tPHL
Propagation delay
CPAB or CPBA to An or Bn
Waveform 1
4.5
5.5
7.0
7.5
10.0
10.5
4.0
5.0
11.0
ns
tPLH
tPHL
Propagation delay
An or Bn to Bn or An
Waveform 2, 3
2.5
4.0
4.5
6.5
7.5
9.0
2.0
4.0
8.5
10.0
ns
tPLH
tPHL
Propagation delay
SAB or SBA to An or Bn
Waveform 2, 3
4.0
5.0
7.0
10.0
3.5
4.5
12.0
10.0
ns
tPZH
tPZL
Output enable time
OEAB or OEBA to An or Bn
Waveform 7, 8
3.0
3.5
5.0
6.0
8.0
8.5
2.5
3.0
8.5
9.0
ns
tPHZ
tPLZ
Output disable time
OEAB or OEBA to An or Bn
Waveform 7, 8
1.5
2.5
4.0
6.0
7.0
8.5
1.0
2.0
7.5
9.0
ns
AC SETUP REQUIREMENTS FOR 74F651A
LIMITS
Tamb = +25°C
Tamb = 0°C to +70°C
SYMBOL
PARAMETER
TEST CONDITION
VCC = +5.0V
VCC = +5.0V ± 10%
UNIT
CL = 50pF, RL = 500
MIN
TYP
MAX
MIN
MAX
tsu (H)
tsu (L)
Setup time, high or low
An or Bn to CPAB or CPBA
Waveform 4
3.5
4.0
4.5
ns
th (H)
th (L)
Hold time, high or low
An or Bn to CPAB or CPBA
Waveform 4
0
ns
tsu (H)
tsu (L)
Setup time, high or low
OEBA to OEAB or OEAB to OEBA
Waveform 5, 6
5.0
ns
th (H)
th (L)
Hold time, high or low
OEBA to OEAB or OEAB to OEBA
Waveform 5, 6
0
ns
tw (H)
tw (L)
Pulse width, high or low
CPAB or CPBA
Waveform 1
4.5
3.5
4.5
4.0
ns
Note to AC setup requirements for 74F651A:
1. Setup time is to protect against surge current caused by enabling 16 outputs (48mA per output) simultaneously.
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