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參數(shù)資料
| 型號： | 935037700602 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 門電路 |
| 英文描述： | F/FAST SERIES, HEX 2-INPUT AND GATE, PDSO20 |
| 封裝： | 7.50 MM, PLASTIC, SOT-163-1, MS-013AC, SO-20 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 84K |
| 代理商： | 935037700602 |
December 1990
2
Philips Semiconductors
Product specication
8-bit magnitude comparator
74HC/HCT688
FEATURES
Compare two 8-bit words
Output capability: standard
ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT688 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT688 are 8-bit magnitude comparators.
They perform comparison of two 8-bit binary or BCD
words.
The output provides P = Q.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25 °C; tr =tf = 6 ns
Notes
1. CPD is used to determine the dynamic power dissipation (PD in W):
PD =CPD × VCC2 × fi + ∑ (CL × VCC2 × fo)
where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
tPHL/ tPLH
propagation delay
CL = 15 pF; VCC =5 V
Pn, Qn to P = Q
1717ns
E to P = Q
8
12
ns
CI
input capacitance
3.5
pF
CPD
power dissipation capacitance per package
notes 1 and 2
30
pF
相關(guān)PDF資料 |
PDF描述 |
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| 935037600623 | F/FAST SERIES, HEX 2-INPUT AND GATE, PDSO20 |
| 935037600602 | F/FAST SERIES, HEX 2-INPUT AND GATE, PDSO20 |
| 935037700623 | F/FAST SERIES, HEX 2-INPUT AND GATE, PDSO20 |
| 935037710623 | F/FAST SERIES, HEX 2-INPUT OR GATE, PDSO20 |
| 935037620602 | F/FAST SERIES, HEX 2-INPUT OR GATE, PDSO20 |
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