參數(shù)資料
型號(hào): 935039730602
廠商: NXP SEMICONDUCTORS
元件分類: 鎖存器
英文描述: F/FAST SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
封裝: 0.300 INCH, PLASTIC, SOT-38-4, DIP-16
文件頁數(shù): 6/10頁
文件大?。?/td> 76K
代理商: 935039730602
Philips Semiconductors
Product specification
74F379A
Quad register
1996 Mar 12
5
AC ELECTRICAL CHARACTERISTICS
LIMITS
Tamb = +25°C
Tamb = 0°C to +70°C
SYMBOL
PARAMETER
TEST
VCC = +5.0V
VCC = +5.0V ± 10%
UNIT
CONDITION
CL = 50pF, RL = 500
MIN
TYP
MAX
MIN
MAX
fmax
Maximum clock frequency
Waveform 1
175
200
155
MHz
tPLH
tPHL
Propagation delay
CP to Qn or Qn
Waveform 1
2.0
4.0
3.5
5.5
6.5
8.0
2.0
3.5
7.0
8.5
ns
AC SETUP REQUIREMENTS
LIMITS
Tamb = +25°C
Tamb = 0°C to +70°C
SYMBOL
PARAMETER
TEST
VCC = +5.0V
VCC = +5.0V ± 10%
UNIT
CONDITION
CL = 50pF, RL = 500
CL= 50pF, RL = 500
MIN
TYP
MAX
MIN
MAX
tsu (H)
tsu (L)
Setup time, high or low level
Dn to CP
Waveform 2
3.0
3.5
ns
th (H)
th (L)
Hold time, high or low level
Dn to CP
Waveform 2
0
ns
tsu (H)
tsu (L)
Setup time, high or low level
E to CP
Waveform 2
4.0
3.5
4.5
4.0
ns
th (H)
th (L)
Hold time, high or low level
E to CP
Waveform 2
0
ns
tw (H)
tw (L)
CP Pulse width,
high or low
Waveform 1
3.5
4.5
3.5
4.5
ns
AC WAVEFORMS
CP
VM
tw(H)
1/fmax
VM
tPLH
tw(L)
tPHL
Qn, Qn
SF00358
Waveform 1. Propagation delay for clock input to output,
clock pulse widths, and maximum clock frequency
VM
tsu(L)
th(L)
tsu(H)
th(H)
En, Dn
CP
SF00296
Waveform 2. Data and enable setup time and hold times
Notes to AC waveforms
1. For all waveforms, VM = 1.5V.
2. The shaded areas indicate when the input is permitted to change
for predictable output performance.
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