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參數(shù)資料
| 型號(hào)： | 935043600602 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ABT SERIES, OCTAL 1-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24 |
| 封裝： | PLASTIC, SO-24 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 73K |
| 代理商： | 935043600602 |
Philips Semiconductors
Product specification
74ABT2953
Octal registered transceiver, inverting (3-State)
1
1995 Sep 06
853-1555 15702
FEATURES
8-bit registered transceiver
Independent registers for A and B buses
Output capability: +64mA/–32mA
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
Live insertion/extraction permitted
Power-up 3-State
Power-up reset
DESCRIPTION
The 74ABT2953 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT2953 device is an 8-bit registered inverting transceiver.
Two 8-bit back-to-back registers store data flowing in both directions
between two bidirectional buses. Data applied to the inputs is
entered and stored on the rising edge of the Clock (CPXX) provided
that the Clock Enable (CEXX) is Low. The data is then present at
the 3-State output buffers, but is only accessible when the Output
Enable (OEXX) is Low. Data flow from A inputs to B outputs is the
same as for B inputs to A outputs.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
Tamb = 25°C; GND = 0V
TYPICAL
UNIT
tPLH
tPHL
Propagation delay
CPBA to An or CPAB to Bn
CL = 50pF; VCC = 5V
5.0
ns
CIN
Input capacitance
VI = 0V or VCC
4
pF
CI/O
I/O capacitance
Outputs disabled;
VO = 0V or VCC
7
pF
ICCZ
Total supply current
Outputs disabled; VCC =5.5V
500
nA
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
24-Pin Plastic DIP
–40
°C to +85°C
74ABT9253 N
74ABT2953 N
SOT222-1
24-Pin plastic SO
–40
°C to +85°C
74ABT2953 D
SOT137-1
24-Pin Plastic SSOP Type II
–40
°C to +85°C
74ABT2953 DB
SOT340-1
24-Pin Plastic TSSOP Type I
–40
°C to +85°C
74ABT2953 PW
74ABT2953PW DH
SOT355-1
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
15
16
17
18
19
20
21
22
23
24
B7
B6
B5
B4
B3
B2
B1
B0
OEAB
A0
CPAB
A1
A2
A3
A4
A5
A6
A7
VCC
OEBA
11
14
CEAB
CPBA
12
13
GND
CEBA
TOP VIEW
SA00305
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND FUNCTION
10, 14
CPAB /
CPBA
Clock input A to B / Clock input
B to A
11, 13
CEAB /
CEBA
Clock enable input A to B / Clock
enable input B to A
16, 17, 18, 19,
20, 21, 22, 23
A0 – A7
Data inputs/outputs (A side)
1, 2, 3, 4, 5, 6,
7, 8
B0 – B7
Data outputs/outputs (B side)
9, 15
OEAB /
OEBA
Output enable inputs
12
GND
Ground (0V)
24
VCC
Positive supply voltage
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