參數(shù)資料
型號(hào): 935063110112
廠商: NXP SEMICONDUCTORS
元件分類: 門電路
英文描述: LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NOR GATE, PDSO14
封裝: 3.90 MM, PLASTIC, SOT-108-1, MS-012, SO-14
文件頁數(shù): 5/9頁
文件大小: 139K
代理商: 935063110112
Philips Semiconductors
Product data
74LV02
Quad 2-input NOR gate
2003 Mar 03
5
AC CHARACTERISTICS
GND = 0 V; tr = tf ≤ 2.5 ns; CL = 50 pF; RL = 1 k
CONDITION
LIMITS
SYMBOL
PARAMETER
WAVEFORM
CONDITION
–40
°C to +85 °C
–40
°C to +125 °C
UNIT
VCC(V)
MIN
TYP.1
MAX
MIN
MAX
1.2
40
2.0
14
21
26
tPHL/tPLH
Propagation delay
nA, nB to nY
Figures 1, 2
2.7
10
15
19
ns
nA, nB to nY
3.0 to 3.6
7.52
12
15
4.5 to 5.5
6.03
10
13
NOTES:
1. Unless otherwise stated, all typical values are measured at Tamb = 25 °C
2. Typical values are measured at VCC = 3.3 V.
3. Typical values are measured at VCC = 5.0 V.
AC WAVEFORMS
VM = 1.5 V at VCC ≥ 2.7 V and ≤ 3.6 V;
VM = 0.5 × VCC at VCC < 2.7 V and ≥ 4.5 V;
VOL and VOH are the typical output voltage drop that occur with the
output load.
SV00392
VI
nA, nB, INPUT
GND
VOH
nY OUTPUT
VOL
VM
tPHL
tPLH
VM
Figure 1. Input (nA, nB) to output (nY) propagation delays.
TEST CIRCUIT
PULSE
GENERATOR
RT
Vl
D.U.T.
VO
CL
RL= 1k
Vcc
Test Circuit for Outputs
DEFINITIONS
VCC
VI
< 2.7V
2.7–3.6V
VCC
2.7V
TEST
tPLH/tPHL
≥ 4.5 V
VCC
RL = Load resistor
CL = Load capacitance includes jig and probe capacitiance
50pF
RT = Termination resistance should be equal to ZOUT of pulse generators.
SV00902
Figure 2. Load circuitry for switching times.
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