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參數(shù)資料
| 型號： | 935078990118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ABT SERIES, OCTAL 1-BIT DRIVER, TRUE OUTPUT, PDSO24 |
| 封裝： | PLASTIC, SSOP-24 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 78K |
| 代理商： | 935078990118 |
Philips Semiconductors
Product specification
74ABT845
8-bit bus interface latch with set and reset
(3-State)
1
1995 Sep 06
853-1703 15702
FEATURES
High speed parallel latches
Ideal where high speed, light loading, or increased fan-in are
required with MOS microprocessors
Broadside pinout
Output capability: +64mA/–32mA
Power-up 3-State
Power-up reset
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
DESCRIPTION
The 74ABT845 consists of eight D-type latches with 3-State outputs.
In addition to the LE, OE, MR and PRE pins, the 74ABT845 has two
additional OE pins, making a total of three Output Enable (OE0,
OE1, OE2) pins. The multiple Output enables allow multiuser control
of the interface, e.g., CS, DMA, and RD/WR.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
Tamb = 25°C; GND = 0V
TYPICAL
UNIT
tPLH
tPHL
Propagation delay
Dn to Qn
CL = 50pF; VCC = 5V
5.4
ns
CIN
Input capacitance
VI = 0V or VCC
4
pF
COUT
Output capacitance
Outputs disabled;
VO = 0V or VCC
7
pF
ICCZ
Total supply current
Outputs disabled; VCC = 5.5V
500
nA
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
24-Pin Plastic DIP
–40
°C to +85°C
74ABT845 N
SOT222-1
24-Pin plastic SO
–40
°C to +85°C
74ABT845 D
SOT137-1
24-Pin Plastic SSOP Type II
–40
°C to +85°C
74ABT845 DB
SOT340-1
24-Pin Plastic TSSOP Type I
–40
°C to +85°C
74ABT845 PW
74ABT845PW DH
SOT355-1
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
15
16
17
18
19
20
21
22
23
24
OE0
OE1
D0
D1
D2
D3
D4
D5
D6
Q6
D7
Q5
Q4
Q3
Q2
Q1
Q0
OE2
VCC
Q7
11
14
MR
PRE
12
13
GND
LE
TOP VIEW
SA00258
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
1, 2, 23
OE0 – OE2
Output enable inputs
(active-Low)
3, 4, 5, 6,
7, 8, 9, 10
D0-D7
Data inputs
22, 21, 20, 19,18,
17, 16, 15
Q0-Q7
Data outputs
11
MR
Master reset input (active-Low)
13
LE
Latch enable input
(active-High)
14
PRE
Preset input (active-Low)
12
GND
Ground (0V)
24
VCC
Positive supply voltage
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