參數(shù)資料
型號(hào)： 935166080118
廠商： NXP SEMICONDUCTORS
元件分類： 計(jì)數(shù)器
英文描述： LV/LV-A/LVX/H SERIES, ASYN NEGATIVE EDGE TRIGGERED 14-BIT UP BINARY COUNTER, PDSO16
封裝： 5.30 MM, PLASTIC, MO-150AC, SOT-338-1, SSOP2-16
文件頁(yè)數(shù)： 4/13頁(yè)
文件大小： 178K
代理商： 935166080118
Philips Semiconductors
Product specification
74LV4060
14-stage binary ripple counter with oscillator
1998 Jun 23
12
C3
Rbias
100 k
W to 1 MW
RS
11
RTC
10
MR (from logic)
C2
100 pF
22 to
37 pF
R2
2.2 k
W
SV00326
Figure 5. External components connection for
a typical crystal oscillator
R2 is the power limiting resistor. For starting and maintaining
oscillation, a minimum transconductance is necessary, so R2 should
not be too large. A practical value for R2 is 2.2 k
W.
VM
CP INPUT
Qn OUTPUT
VOL
VOH
GND
VI
VM
tPLH
tPHL
tW
1/fmax
SV00322
Figure 6.
Waveforms showing the clock (RS) to output (Q3) propagation
delays, the clock pulse width, the output transition times and the
maximum clock frequency.
VM
MR INPUT
RS INPUT
VI
VCC
VI
GND
Qn OUTPUT
VM
trem
tPHL
tW
VM
SV00329
Figure 7.
Waveforms showing the master reset (MR) pulse width, the master
reset to output (Qn) propagation delays and the master reset to
clock (RS) removal time.
VM
Qn OUTPUT
VOH
VOL
Qn+1 OUTPUT
VM
tPLH
tPHL
SV00327
Figure 8.
Waveforms showing the output Qn to output n + 1 propagation
delays.
NOTES:
1. VM = 1.5 V at VCC > 2.7 V and < 3.6 V
VM = 0.5 . VCC at VCC < 2.7 V and > 4.5 V.
2. VOL and VOH are the typical output voltage drop that occur with
the output load.
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