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參數(shù)資料
| 型號： | 935170210118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 鎖存器 |
| 英文描述： | LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 |
| 封裝： | 5.30 MM, PLASTIC, MO-150AB, SOT-337-1, SSOP2-14 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大小： | 135K |
| 代理商： | 935170210118 |
1999 Aug 05
3
Philips Semiconductors
Product specication
16-bit D-type transparent latch with 30
series
termination resistors; 5 V input/output tolerant; 3-state
74LVC162373A;
74LVCH162373A
QUICK REFERENCE DATA
GND = 0 V; Tamb =25 °C; tr =tf ≤ 2.5 ns.
Note
1. CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
∑ (CL × VCC2 × fo) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in Volts.
ORDERING INFORMATION
PINNING
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
tPHL/tPLH
propagation delay
CL = 50 pF; VCC = 3.3 V
Dn to Qn
3.2
ns
LE to Qn
3.5
ns
CI
input capacitance
5.0
pF
CPD
power dissipation capacitance per
latch
VCC = 3.3 V; note 1
26.0
pF
OUTSIDE NORTH
AMERICA
NORTH AMERICA
PACKAGE
TEMPERATURE
RANGE
PINS
PACKAGE
MATERIAL
CODE
74LVC162373ADL
VC162373A DL
40 to +85 °C
48
SSOP
plastic
SOT370-1
74LVC162373ADGG
VC162373A DGG
48
TSSOP
plastic
SOT362-1
74LVCH162373ADL
VCH162373A DL
48
SSOP
plastic
SOT370-1
74LVCH162373ADGG
VCH162373A DGG
48
TSSOP
plastic
SOT362-1
PIN
SYMBOL
DESCRIPTION
11OE
output enable input (active LOW)
2, 3, 5, 6, 8, 9, 11, 12
1Q0 to 1Q7
data inputs/outputs
4, 10, 15, 21, 28, 34, 39, 45
GND
ground (0 V)
7, 18, 31, 42
VCC
DC supply voltage
13, 14, 16, 17, 19, 20, 22, 23 2Q0 to 2Q7
data inputs/outputs
24
2OE
output enable input (active LOW)
25
2LE
latch enable input (active HIGH)
36, 35, 33, 32, 30, 29, 27, 26 2D0 to 2D7
data inputs
47, 46, 44, 43, 41, 40, 38, 37 1D0 to 1D7
data inputs
48
1LE
latch enable input (active HIGH)
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