參數(shù)資料
型號: 935173820151
廠商: NXP SEMICONDUCTORS
元件分類: ADC
英文描述: 2-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48
封裝: PLASTIC, SOT-313-2, LQFP-48
文件頁數(shù): 2/28頁
文件大小: 263K
代理商: 935173820151
1996 Feb 01
10
Philips Semiconductors
Product specication
YC 8-bit low-power analog-to-digital video
interface
TDA8758
Notes
1. 0 dB is obtained at the AGC amplifier when applying VI(p-p) = 1.0 V on Y channel.
2. It is recommended that the rise and fall times of the clock are
≥1 ns. In addition, a ‘good layout’ for the digital and
analog grounds is recommended.
3. THD (total harmonic distortion) is obtained with the addition of the first five harmonics:
a) F being the fundamental harmonic referenced at 0 dB for a full-scale sine wave input.
4. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8 K acquisition points per equivalent
fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency
(NYQUIST frequency). Conversion to signal-to-noise ratio: S/N = EB
× 6.02 + 1.76 dB.
5. Measurement carried out using video analyser VM700A, where video analog signal is reconstructed through a
digital-to-analog converter.
6. The supply voltage ripple rejection is the relative variation of the analog signal (full-scale signal at input) for 0.5 V of
supply variation:
Timing (fclk = 32 MHz); see Fig.9
DIGITAL OUTPUTS (CL = 15 pF)
tds
sampling delay time
2
ns
th
output hold time
10
ns
td
output delay time
15
18
ns
tW
clamp pulse width
see Figs 6 and 7
2
3
s
3-state output delay times; see Fig.10
tdZH
enable HIGH
12
14
ns
tdZL
enable LOW
10
12
ns
tdHZ
disable HIGH
58
62
ns
tdLZ
disable LOW
70
74
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
THD
20 log
F
(2nd)
2
(3rd)
2
(4th)
2
(5th)
2
(6th)
2
+
+++
---------------------------------------------------------------------------------------------------------------
=
SVRR2
V
I00
()
V
IFF
()
()
V
I00
()
V
IFF
()
()
×
V
CCA
-----------------------------------------------------------------------------------------------------
=
相關PDF資料
PDF描述
935173820551 2-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48
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935173820157 2-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48
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