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參數(shù)資料
| 型號(hào)： | 935174560112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 鎖存器 |
| 英文描述： | HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 |
| 封裝： | 4.40 MM, PLASTIC, MO-153, SOT-403-1, TSSOP-16 |
| 文件頁(yè)數(shù)： | 6/18頁(yè) |
| 文件大小： | 183K |
| 代理商： | 935174560112 |
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Philips Semiconductors - PIP - 74HC175;74HCT175; quad D-type flip-flop with reset; positive-edge trigger
Product Information
74HC175;74HCT175;
quad D-type flip-flop
with reset; positive-
edge trigger
Information as of 2003-04-22
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Applications
Block diagram
topGeneral description
The 74HC/HCT175 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT175 have four edge-triggered, D-type flip-flops with individual D inputs and both Q and Q outputs.
The common clock (CP) and master reset (MR) inputs load and reset (clear) all flip-flops simultaneously.
The state of each D inputone set-up time before the LOW-to-HIGH clock transitionis transferred to the
corresponding output (Qn ) of the flip-flop.
All Qn outputs will be forced LOW independently of clock or data inputs by a LOW voltage level on the MR input.
The device is useful for applications where both the true and complement outputs are required and the clock and
master reset are common to all storage elements.
topFeatures
q
Four edge-triggered D flip-flops
q
Output capability: standard
q
ICC category: MSI
topDatasheet
Page
count
File
size
(kB)
Datasheet
74HC175;74HCT175 quad D-type
flip-flop with
reset;
positive-edge
trigger
7/8/1998
Product
specification
5
91
Additional datasheet info
file:///G|/imaging/BITTING/CPL/20030424/04232003_9/PHGL/_HTML04232003/74HC175N.html (1 of 5) [Apr-29-2003 12:32:02 PM]
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