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參數(shù)資料
| 型號： | 935176360118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVT SERIES, OCTAL 1-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封裝： | 4.40 MM, PLASTIC, MO-153, SOT-360-1, TSSOP-20 |
| 文件頁數(shù)： | 11/16頁 |
| 文件大小： | 111K |
| 代理商： | 935176360118 |
74LVT573_4
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 15 September 2008
4 of 16
NXP Semiconductors
74LVT573
3.3 V octal D-type transparent latch; (3-state)
5.2 Pin description
6.
Functional description
6.1 Function table
[1]
H = HIGH voltage level;
L = LOW voltage level;
↓ = HIGH-to-LOW latch enable transition;
h = HIGH voltage level one setup time prior to the LOW-to-HIGH clock transition;
l = LOW voltage level one setup time prior to the LOW-to-HIGH clock transition;
Z = high-impedance OFF-state;
NC = no change;
X = don’t care.
7.
Limiting values
Table 2.
Pin description
Symbol
Pin
Description
OE
1
output enable input (active LOW)
D0 to D7
2, 3, 4, 5, 6, 7, 8, 9
data input
GND
10
ground (0 V)
LE
11
latch enable (active HIGH)
Q0 to Q7
19, 18, 17, 16, 15, 14, 13, 12
data output
VCC
20
supply voltage
Table 3.
Function table [1]
Operating mode
Control OE
Control LE
Input Dn
Internal register Output Qn
Load and read register
enable
LH
LLL
HHH
Latch and read register
L
↓
lL
L
hH
H
Hold
L
X
NC
Disable outputs
H
X
NC
Z
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
0.5
+4.6
V
VI
input voltage
0.5
+7.0
V
VO
output voltage
output in OFF-state or HIGH-state
0.5
+7.0
V
IIK
input clamping current
VI <0V
-
50
mA
IOK
output clamping current
VO <0V
-
50
mA
IO
output current
output in LOW-state
-
128
mA
output in HIGH-state
-
64
mA
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