參數(shù)資料
型號: 935183570112
廠商: NXP SEMICONDUCTORS
元件分類: 總線收發(fā)器
英文描述: HC/UH SERIES, OCTAL 1-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20
封裝: PLASTIC, TSSOP-20
文件頁數(shù): 2/7頁
文件大?。?/td> 46K
代理商: 935183570112
September 1993
2
Philips Semiconductors
Product specication
Octal bus transceiver; 3-state
74HC/HCT245
FEATURES
Octal bidirectional bus interface
Non-inverting 3-state outputs
Output capability: bus driver
ICC category: MSI
GENERAL DESCRIPTIONS
The 74HC/HCT245 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT245 are octal transceivers featuring
non-inverting 3-state bus compatible outputs in both send
and receive directions. The “245” features an output
enable (OE) input for easy cascading and a send/receive
(DIR) for direction control. OE controls the outputs so that
the buses are effectively isolated. The “245” is similar to
the “640” but has true (non-inverting) outputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25 °C; tr =tf = 6 ns
Notes
1. CPD is used to determine the dynamic power dissipation (PD in W):
PD =CPD × VCC2 × fi +∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
tPHL/ tPLH
propagation delay
An to Bn;Bn to An
CL = 15 pF; VCC =5V
7
10
ns
CI
input capacitance
3.5
pF
CI/O
input/output capacitance
10
pF
CPD
power dissipation capacitance per transceiver notes 1 and 2
30
pF
相關(guān)PDF資料
PDF描述
935183570118 HC/UH SERIES, OCTAL 1-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20
933713590652 HCT SERIES, OCTAL 1-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20
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