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參數(shù)資料
| 型號： | 935184420118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ABT SERIES, 16 1-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | 7.50 MM, PLASTIC, MO-118, SOT-370-1, SSOP3-48 |
| 文件頁數(shù)： | 7/11頁 |
| 文件大小： | 98K |
| 代理商： | 935184420118 |
Philips Semiconductors
Product data
74ABT16245B
74ABTH16245B
16-bit bus transceiver (3-State)
2002 Dec 13
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Tamb = +25 °C
Tamb = –40 °C
to +85
°C
UNIT
Min
Typ
Max
Min
Max
VIK
Input clamp voltage
VCC = 4.5 V; IIK = –18 mA
–0.9
–1.2
V
VCC = 4.5 V; IOH = –3 mA; VI = VIL or VIH
2.5
2.9
2.5
V
VOH
High-level output voltage
VCC = 5.0 V; IOH = –3 mA; VI = VIL or VIH
3.0
3.4
3.0
V
VCC = 4.5 V; IOH = –32 mA; VI = VIL or VIH
2.0
2.4
2.0
V
VOL
Low-level output voltage
VCC = 4.5 V; IOL = 64 mA; VI = VIL or VIH
0.42
0.55
V
II
Input leakage current
VCC = 5.5 V; VI = GND or 5.5 V
Control
pins
±0.01
±1.0
A
Bus hold current
VCC = 4.5 V; VI = 0.8 V
50
IHOLD
Bus hold current
A and B inputs
74ABTH16245B
VCC = 5.5 V; VI = 2.0 V
–75
A
74ABTH16245B
VCC = 5.5 V; VI = 0 to 5.5 V
±500
IOFF
Power-off leakage current
VCC = 0.0 V; VO or VI ≤ 4.5 V
±5.0
±100
A
IPU/IPD
Power-up/down 3-State
output current
VCC = 2.0 V; VO = 0.5 V; VI = GND or VCC;
VOE = Don’t care
±5.0
±50
A
IIH+IOZH
3-State output HIGH current
VCC = 5.5 V; VO = 5.5 V; VI = VIL or VIH
0.1
10
A
IIL+IOZL
3-State output LOW current
VCC = 5.5 V; VO = 0.0 V; VI = VIL or VIH
0.1
10
A
ICEX
Output high leakage current
VCC = 5.5 V; VO = 5.5 V; VI = GND or VCC
5.0
50
A
IO
Output current1
VCC = 5.5 V; VO = 2.5 V
–50
–92
–180
–50
–180
mA
ICCH
VCC = 5.5 V; Outputs High, VI = GND or VCC
0.30
0.70
mA
ICCL
Quiescent supply current
VCC = 5.5 V; Outputs Low, VI = GND or VCC
10
19
mA
ICCZ
VCC = 5.5 V; Outputs 3-State;
VI = GND or VCC
0.30
0.70
mA
Outputs enabled, one data input at 3.4 V,
other inputs at VCC or GND; VCC = 5.5 V
400
700
A
ICC
Additional supply current per
input pin2
Outputs disabled, one data input at 3.4 V,
other inputs at VCC or GND; VCC = 5.5 V
100
250
A
in ut in
Control pins, outputs disabled, one enable
input at 3.4 V, other inputs at VCC or GND;
VCC = 5.5 V
400
700
A
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4 V.
3. This is the bus hold overdrive current required to force the input to the opposite logic state.
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