參數(shù)資料
型號： 935187420112
廠商： NXP SEMICONDUCTORS
元件分類： 計數(shù)器
英文描述： HC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO14
封裝： SOT-337-1, SSOP-14
文件頁數(shù)： 7/11頁
文件大?。?/td> 135K
代理商： 935187420112
December 1990
5
Philips Semiconductors
Product specication
Dual 4-bit binary ripple counter
74HC/HCT393
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
SYMBOL
PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HC
VCC
(V)
WAVEFORMS
+25
40 to +85 40 to +125
min.
typ. max. min.
max.
min.
max.
tPHL/ tPLH propagation delay
nCP to nQ0
41
15
12
125
25
21
155
31
26
190
38
32
ns
2.0
4.5
6.0
Fig.7
tPHL/ tPLH propagation delay
nQn to nQn+1
14
5
4
45
9
8
55
11
9
70
14
12
ns
2.0
4.5
6.0
Fig.7
tPHL
propagation delay
nMR to nQn
39
14
11
140
28
24
175
35
30
210
42
36
ns
2.0
4.5
6.0
Fig.8
tTHL/ tTLH output transition time
19
7
6
75
15
13
95
19
16
110
22
19
ns
2.0
4.5
6.0
Fig.7
tW
clock pulse width
HIGH or LOW
80
16
14
17
6
5
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.7
tW
master reset pulse
width; HIGH
80
16
14
19
7
6
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.8
trem
removal time
nMR to nCP
5
3
1
5
ns
2.0
4.5
6.0
Fig.8
fmax
maximum clock pulse
frequency
6
30
35
30
90
107
5
24
28
4
20
24
MHz
2.0
4.5
6.0
Fig.7
相關(guān)PDF資料
PDF描述
933714120652 HCT SERIES, ASYN NEGATIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO14
933714120653 HCT SERIES, ASYN NEGATIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO14
933669420652 HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP16
933714560652 HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO16
935189250112 HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO16
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