參數(shù)資料
型號(hào)： 935190070112
廠商： NXP SEMICONDUCTORS
元件分類： 多路復(fù)用及模擬開(kāi)關(guān)
英文描述： 8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO20
封裝： SOT-339, SSOP-20
文件頁(yè)數(shù)： 8/21頁(yè)
文件大?。?/td> 205K
代理商： 935190070112
December 1990
16
Philips Semiconductors
Product specication
8-channel analog multiplexer/demultiplexer
with latch
74HC/HCT4351
TEST CIRCUIT AND WAVEFORMS
Fig.20 Test circuit for measuring AC performance.
Conditions
TEST
SWITCH
Vis
tPZH
VEE
VCC
tPZL
VCC
VEE
tPHZ
VEE
VCC
tPLZ
VCC
VEE
others
open
pulse
FAMILY
AMPLITUDE
VM
tr; tf
fmax;
PULSE WIDTH
OTHER
74HC
VCC
50%
< 2 ns
6 ns
74HCT
3.0 V
1.3 V
< 2 ns
6 ns
CL
=
load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values).
RT
=
termination resistance should be equal to the output impedance ZO of the pulse generator.
tr
=tf = 6 ns; when measuring fmax, there is no constraint on tr, tf with 50% duty factor.
Conditions
TEST
SWITCH
Vis
tPZH
VEE
VCC
tPZL
VCC
VEE
tPHZ
VEE
VCC
tPLZ
VCC
VEE
others
open
pulse
FAMILY
AMPLITUDE
VM
tr; tf
fmax;
PULSE WIDTH
OTHER
74HC
VCC
50%
< 2 ns
6 ns
74HCT
3.0 V
1.3 V
< 2 ns
6 ns
CL
=
load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values).
RT
=
termination resistance should be equal to the output impedance ZO of the pulse generator.
tr
=tf = 6 ns; when measuring fmax, there is no constraint on tr, tf with 50% duty factor.
Fig.21 Input pulse definitions.
相關(guān)PDF資料
PDF描述
933757490112 8-CHANNEL, SGL ENDED MULTIPLEXER, PDIP20
935190060112 8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO20
933774600118 8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO20
935190060118 8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO20
933771700652 8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO20
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