參數(shù)資料
型號： 935199950112
廠商： NXP SEMICONDUCTORS
元件分類： 總線收發(fā)器
英文描述： ABT SERIES, OCTAL 1-BIT DRIVER, TRUE OUTPUT, PDIP20
封裝： PLASTIC, DIP-20
文件頁數(shù)： 8/11頁
文件大?。?/td> 50K
代理商： 935199950112
Philips Semiconductors
Product specification
74ABT574A
Octal D-type flip-flop (3-State)
1995 May 22
6
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
Tamb = +25oC
VCC = +5.0V
Tamb = -40 to +85oC
VCC = +5.0V ±0.5V
UNIT
Min
Typ
Min
ts(H)
ts(L)
Setup time, High or Low
Dn to CP
2
1.0
0.6
0.2
1.0
ns
th(H)
th(L)
Hold time, High or Low
Dn to CP
2
1.0
–0.7
–0.4
1.0
ns
tw(H)
tw(L)
CP pulse width
High or Low
1
2.0
0.7
0.8
2.0
ns
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
VM
1/fMAX
tw(H)
tw(L)
tPHL
tPLH
CP
Qn
SA00056
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
VM
Dn
VM
CP
ts(H)
th(H)
ts(L)
th(L)
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
SA00107
Waveform 2. Data Setup and Hold Times
OE
VM
tPZH
tPHZ
0V
VOH –0.3V
Qn
VM
SA00108
VOH
Waveform 3. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
OE
tPZL
tPLZ
VOL +0.3V
Qn
VM
VOL
SA00109
Waveform 4. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
相關(guān)PDF資料
PDF描述
06761.25 CONNECTOR ACCESSORY
935200660118 4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, PDSO14
933373130652 4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, PDSO14
935200660112 4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, PDSO14
933324290652 4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, PDIP14
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