參數(shù)資料
型號: 935203240112
廠商: NXP SEMICONDUCTORS
元件分類: 總線收發(fā)器
英文描述: ABT SERIES, 16 1-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
封裝: 6.10 MM, PLASTIC, MO-153, SOT-364-1, TSSOP2-56
文件頁數(shù): 10/12頁
文件大?。?/td> 113K
代理商: 935203240112
Philips Semiconductors
Product data
74ABT16652
16-bit transceiver/register, non-inverting (3-State)
2002 Apr 03
7
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Tamb = +25 °C
Tamb = –40 °C
to +85
°C
UNIT
MIN
TYP
MAX
MIN
MAX
VIK
Input clamp voltage
VCC = 4.5 V; IIK = –18 mA
–0.9
–1.2
V
VCC = 4.5 V; IOH = –3 mA; VI = VIL or VIH
2.5
2.9
2.5
V
VOH
HIGH-level output voltage
VCC = 5.0 V; IOH = –3 mA; VI = VIL or VIH
3.0
4.0
3.0
V
VCC = 4.5 V; IOH = –32 mA; VI = VIL or VIH
2.0
2.4
2.0
V
VOL
LOW-level output voltage
VCC = 4.5 V; IOL = 64 mA; VI = VIL or VIH
0.35
0.55
V
VRST
Power-up output low voltage3
VCC = 5.5 V; IOL = 1 mA; VI = GND or VCC
0.13
0.55
V
I
Input leakage current
V
55 V; V
GND or V
Control pins
±001
±10
A
II
Input leakage current
VCC = 5.5 V; VI = GND or VCC
Control pins
±0.01
±1.0
A
IOFF
Power-off leakage current
VCC = 0 V; VO = 4.5 V; VI = 0 V or 5.5 V
±1.0
±100
A
IPU/PD
Power-up/down 3-State
output current4
VCC = 2.1 V; VO = 0.0 V; VI = GND or VCC
±1.0
±50
A
IIH + IOZH
3-State output HIGH current
VCC = 5.5 V; VO = 5.5 V; VI = VIL or VIH
1.0
10
A
IIL + IOZL
3-State output LOW current
VCC = 5.5 V; VO = 0.0 V; VI = VIL or VIH
–1.0
–10
A
ICEX
Output HIGH leakage current
VCC = 5.5 V; VO = 5.5 V; VI = GND or VCC
5.0
50
A
IO
Output current1
VCC = 5.5 V; VO = 2.5 V
–50
–80
–180
–50
–180
mA
ICCH
VCC = 5.5 V;
Outputs HIGH, VI = GND or VCC
0.5
2
mA
ICCL
Quiescent supply current
VCC = 5.5 V;
Outputs LOW, VI = GND or VCC
8
19
mA
ICCZ
VCC = 5.5 V;
Outputs 3-State; VI = GND or VCC
0.5
2
mA
ICC
Additional supply current per
input pin2
VCC = 5.5 V; one input at 3.4 V,
other inputs at VCC or GND
5.0
50
A
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4 V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any VCC between 0 V and 2.1 V. When the part enables with VCC between 2.1 V and 4.5 V, the outputs will
correctly function with respect to all input logic states.
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