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參數(shù)資料
| 型號： | 935203520118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ABT SERIES, 20 1-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | 6.10 MM, PLASTIC, MO-153, SOT-364-1, TSSOP2-56 |
| 文件頁數(shù)： | 6/10頁 |
| 文件大?。?/td> | 92K |
| 代理商： | 935203520118 |
Philips Semiconductors
Product data
74ABT16827A
74ABTH16827A
20-bit buffer/line driver, non-inverting (3-State)
2002 Dec 17
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Tamb = +25 °C
Tamb = –40 °C
to +85
°C
UNIT
MIN
TYP
MAX
MIN
MAX
VIK
Input clamp voltage
VCC = 4.5 V; IIK = –18 mA
–0.9
–1.2
V
VCC = 4.5 V; IOH = –3 mA; VI = VIL or VIH
2.5
2.9
2.5
V
VOH
HIGH-level output voltage
VCC = 5.0 V; IOH = –3 mA; VI = VIL or VIH
3.0
3.4
3.0
V
VCC = 4.5 V; IOH = –32 mA; VI = VIL or VIH
2.0
2.4
2.0
V
VOL
LOW-level output voltage
VCC = 4.5 V; IOL = 64 mA; VI = VIL or VIH
0.42
0.55
V
II
Input leakage current
VCC = 5.5 V; VI = GND or 5.5 V
±0.01
±1.0
A
VCC = 5.5 V; VI = 5.5 V
0.01
1
A
I
Input leakage current
VCC = 5.5 V; VI = VCC or GND
Control pins
±0.01
±1
A
II
g
74ABTH16827A
VCC = 5.5 V; VI = VCC
Data pins4
0.01
1
A
VCC = 5.5 V; VI = 0
Data pins4
–1
–3
–5
A
B
H ld
tAi
t 5
VCC = 4.5 V; VI = 0.8 V
35
IHOLD
Bus Hold current A inputs5
74ABTH16827A
VCC = 4.5 V; VI = 2.0 V
–75
A
74ABTH16827A
VCC = 5.5 V; VI = 0 to 5.5 V
±800
IOFF
Power-off leakage current
VCC = 0.0 V; VO = 4.5 V; VI = 0 V or 5.5 V
±5.0
±100
A
IPU/IPD
Power-up/down 3-State
output current3
VCC = 2.1 V; VO = 0.5 V; VI = GND or VCC;
V OE = Don’t care
±5.0
±50
A
IOZH
3-State output High current
VCC = 5.5 V; VO = 2.7 V; VI = VIL or VIH
1.0
10
A
IOZL
3-State output Low current
VCC = 5.5 V; VO = 0.5 V; VI = VIL or VIH
–1.0
–10
A
ICEX
Output HIGH leakage
current
VCC = 5.5 V; VO = 5.5 V; VI = GND or VCC
1.0
50
A
IO
Output current1
VCC = 5.5 V; VO = 2.5 V
–50
–70
–180
–50
–180
mA
ICCH
VCC = 5.5 V; Outputs HIGH, VI = GND or VCC
0.5
1
mA
ICCL
Quiescent supply current
VCC = 5.5 V; Outputs LOW, VI = GND or VCC
9
19
mA
ICCZ
VCC = 5.5 V; Outputs 3-State;
VI = GND or VCC
0.5
1
mA
ICC
Additional supply current
per input pin2
VCC = 5.5 V; one input at 3.4 V,
other inputs at VCC or GND
0.2
1
mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4 V.
3. This parameter is valid for any VCC between 0 V and 2.1 V with a transition time of up to 10 msec. From VCC = 2.1 V to VCC = 5 V ± 10% a
transition time of up to 100
sec is permitted.
4. Unused pins at VCC or GND.
5. This is the bus hold overdrive current required to force the input to the opposite logic state.
AC CHARACTERISTICS
GND = 0 V, tR = tF = 2.5 ns, CL = 50 pF, RL = 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
Tamb = +25 °C
VCC = +5.0 V
Tamb = –40 °C to +85 °C
VCC = +5.0 V ±0.5 V
UNIT
MIN
TYP
MAX
MIN
MAX
tPLH
tPHL
Propagation delay
nAx to nYx
1
1.0
0.6
1.7
1.4
2.4
2.0
1.0
0.6
2.7
2.3
ns
tPZH
tPZL
Output enable time
to HIGH and LOW level
2
1.0
3.0
4.1
4.0
1.0
5.0
ns
tPHZ
tPLZ
Output disable time
from HIGH and LOW level
2
2.0
1.6
3.2
2.4
4.3
3.2
2.0
1.6
5.0
3.5
ns
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