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參數(shù)資料
| 型號(hào)： | 935207460118 |
| 廠(chǎng)商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 總線(xiàn)收發(fā)器 |
| 英文描述： | ABT SERIES, 20 1-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | 7.50 MM, PLASTIC, MO-118, SOT-371-1, SSOP3-56 |
| 文件頁(yè)數(shù)： | 7/11頁(yè) |
| 文件大?。?/td> | 121K |
| 代理商： | 935207460118 |
Philips Semiconductors
Product data
74ABT16841A
74ABTH16841A
20-bit bus interface latch (3-State)
2002 Dec 17
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Tamb = +25 °C
Tamb = –40 °C
to +85
°C
UNIT
Min
Typ
Max
Min
Max
VIK
Input clamp voltage
VCC = 4.5 V; IIK = –18 mA
–0.9
–1.2
V
VCC = 4.5 V; IOH = –3 mA; VI = VIL or VIH
2.5
2.9
2.5
V
VOH
HIGH-level output voltage
VCC = 5.0 V; IOH = –3 mA; VI = VIL or VIH
3.0
3.4
3.0
V
VCC = 4.5 V; IOH = –32 mA; VI = VIL or VIH
2.0
2.4
2.0
V
VOL
LOW-level output voltage
VCC = 4.5 V; IOL = 64 mA; VI = VIL or VIH
0.42
0.55
V
VRST
Power-up output voltage3
VCC = 5.5 V; IO = 1 mA; VI = GND or VCC
0.13
0.55
V
Input leakage current
II
In ut leakage current
74ABT16841A
VCC = 5.5 V; VI = VCC or GND
±0.01
±1
±1.0
A
I
74ABT16841A
CC
I
CC
Input leakage current
VCC = 5.5 V; VI = VCC or GND
Control pins
±0.01
±1
A
II
Input leakage current
74ABTH16841A
VCC = 5.5 V; VI = VCC
Data pins5
0.01
1
A
74ABTH16841A
VCC = 5.5 V; VI = 0 V
Data ins5
–2
–3
–5
A
Bus Hold current inputs6
VCC = 4.5 V; VI = 0.8 V
35
IHOLD
Bus Hold current inputs6
74ABTH16841A
VCC = 4.5 V; VI = 2.0 V
–75
A
74ABTH16841A
VCC = 5.5 V; VI = 0 to 5.5 V
±800
IOFF
Power-off leakage current
VCC = 0.0 V; VO or VI ≤ 4.5 V
±5.0
±100
A
IPU/PD
Power-up/down 3-State
output current4
VCC = 2.1 V; VO = 0.5 V; VI = GND or VCC;
VOE = Don’t care
±5.0
±50
A
IOZH
3-State output High current
VCC = 5.5 V; VO = 2.7 V; VI = VIL or VIH
5.0
10
A
IOZL
3-State output Low current
VCC = 5.5 V; VO = 0.5 V; VI = VIL or VIH
–5.0
–10
A
ICEX
Output High leakage current
VCC = 5.5 V; VO = 5.5 V; VI = GND or VCC
50
A
IO
Output current1
VCC = 5.5 V; VO = 2.5 V
–50
–70
–180
–50
–180
mA
ICCH
VCC = 5.5 V; Outputs High, VI = GND or VCC
0.5
1
mA
ICCL
Quiescent supply current
VCC = 5.5 V; Outputs Low, VI = GND or VCC
10
19
mA
ICCZ
VCC = 5.5 V; Outputs 3-State; VI = GND or VCC
0.5
1
mA
ICC
Additional supply current per
input pin2
VCC = 5.5 V; one input at 3.4 V, other inputs at
VCC or GND
0.2
1
mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4 V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any VCC between 0 V and 2.1 V with a transition time of up to 10 msec. From VCC = 2.1 V to VCC = 5 V ± 10% a
transition time of up to 100
sec is permitted.
5. Unused pins at VCC or GND.
6. This is the bus hold overdrive current required to force the input to the opposite logic state.
AC CHARACTERISTICS
GND = 0 V, tR = tF = 2.5 ns, CL = 50 pF, RL = 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
Tamb = +25 °C
VCC = +5.0 V
Tamb = –40 °C to +85 °C
VCC = +5.0 V ±0.5 V
UNIT
MIN
TYP
MAX
MIN
MAX
tPLH
tPHL
Propagation delay
nDx to nQx
2
1.1
1.5
3.1
2.2
4.1
3.1
1.1
1.5
4.9
3.6
ns
tPLH
tPHL
Propagation delay
nLE to nQx
1
1.5
1.0
2.5
2.1
3.3
2.8
1.5
1.0
3.7
3.1
ns
tPZH
tPZL
Output enable time
to HIGH and LOW level
4
5
1.2
2.4
2.2
3.2
2.9
1.2
4.0
3.6
ns
tPHZ
tPLZ
Output disable time
from HIGH and LOW level
4
5
1.8
1.5
3.0
2.5
4.0
3.2
1.8
1.5
4.9
3.7
ns
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