參數(shù)資料
型號： 935208620112
廠商： NXP SEMICONDUCTORS
元件分類： 門電路
英文描述： ABT SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14
封裝： 3.90 MM, PLASTIC, MS-012AB, SOT-108-1, SO-14
文件頁數(shù)： 3/9頁
文件大?。?/td> 94K
代理商： 935208620112
Philips Semiconductors
Product specification
74ABT10
Triple 3-input NAND gate
1995 Sep 22
3
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
VCC
DC supply voltage
–0.5 to +7.0
V
IIK
DC input diode current
VI < 0
–18
mA
VI
DC input voltage3
–1.2 to +7.0
V
IOK
DC output diode current
VO < 0
–50
mA
VOUT
DC output voltage3
output in Off or High state
–0.5 to +5.5
V
IOUT
DC output current
output in Low state
40
mA
Tstg
Storage temperature range
–65 to 150
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
MIN
MAX
UNIT
VCC
DC supply voltage
4.5
5.5
V
VI
Input voltage
0
VCC
V
VIH
High-level input voltage
2.0
V
VIL
Low-level input voltage
0.8
V
IOH
High-level output current
–15
mA
IOL
Low-level output current
20
mA
t/v
Input transition rise or fall rate
0
10
ns/V
Tamb
Operating free-air temperature range
–40
+85
°C
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Tamb = +25°C
Tamb = –40°C
to +85
°C
UNIT
MIN
TYP
MAX
MIN
MAX
VIK
Input clamp voltage
VCC = 4.5V; IIK = –18mA
–0.9
–1.2
V
VOH
High-level output voltage
VCC = 4.5V; IOH = –15mA; VI = VIL or VIH
2.5
2.9
2.5
V
VOL
Low-level output voltage
VCC = 4.5V; IOL = 20mA; VI = VIL or VIH
0.35
0.5
V
II
Input leakage current
VCC = 5.5V; VI = GND or 5.5V
±0.01
±1.0
A
IOFF
Power-off leakage current
VCC = 0.0V; VO or VI ≤ 4.5V
±5.0
±100
A
ICEX
Output High leakage current
VCC = 5.5V; VO = 5.5V; VI = GND or VCC
5.0
50
A
IO
Output current1
VCC = 5.5V; VO = 2.5V
–50
–75
–180
–50
–180
mA
ICC
Quiescent supply current
VCC = 5.5V; VI = GND or VCC
2
50
A
ICC
Additional supply current per
input pin2
VCC = 5.5V; One data input at 3.4V, other
inputs at VCC or GND
0.25
500
A
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flop or latch after applying the power.
相關(guān)PDF資料
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935208650112 ABT SERIES, TRIPLE 3-INPUT NAND GATE, PDIP14
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