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參數(shù)資料
| 型號： | 935209050112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 門電路 |
| 英文描述： | LVT SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14 |
| 封裝： | 3.90 MM, PLASTIC, MS-012AB, SOT-108-1, SO-14 |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 79K |
| 代理商： | 935209050112 |
Philips Semiconductors
Product specification
74LVT10
3.3V Triple 3-input NAND gate
2
1996 May 10
853–1832 16801
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
Tamb = 25°C;
GND = 0V
TYPICAL
UNIT
tPLH
tPHL
Propagation
delay
An, Bn, Cn
to Yn
CL = 50pF;
VCC = 3.3V
3.8
3.3
ns
CIN
Input
capacitance
VI = 0V or 3.0V
2
pF
ICCL
Total supply
current
Outputs Low;
VCC = 3.6V
1
mA
PIN CONFIGURATION
14
13
12
11
10
9
8
7
6
5
4
3
2
1
GND
VCC
B2
A2
Y2
C2
C0
Y0
A0
B0
Y1
A1
B1
C1
SA00346
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
NAME AND FUNCTION
1, 2, 3, 4, 5,
9, 10, 11, 13
An, Bn,
Cn
Data inputs
6, 8, 12
Yn
Data outputs
7
GND
Ground (0V)
14
VCC
Positive supply voltage
LOGIC SYMBOL
A0
B0
C0
B1
C1
A2
B2
A1
Y0Y1Y2
12
6
8
1
2
13
3
4
5
9
10
VCC = Pin 14
GND = Pin 7
SA00347
C2
11
LOGIC SYMBOL (IEEE/IEC)
SV00059
&
12
6
8
1
2
13
3
4
5
9
10
11
LOGIC DIAGRAM
VCC = Pin 14
GND = Pin 7
SA00348
Y0
Y1
Y2
12
6
8
1
2
13
3
4
5
9
10
11
A0
B0
C0
A1
B1
C1
A2
B2
C2
FUNCTION TABLE
INPUTS
OUTPUTS
INPUTS
OUTPUTS
Dna
Dnb
Dnc
Qn
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
NOTES:
H = High voltage level
L
= Low voltage level
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
14-Pin Plastic SO
–40
°C to +85°C
74LVT10 D
SOT108-1
14-Pin Plastic SSOP
–40
°C to +85°C
74LVT10 DB
SOT337-1
14-Pin Plastic TSSOP
–40
°C to +85°C
74LVT10 PW
74LVT10PW DH
SOT402-1
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