參數(shù)資料
型號: 935209210112
廠商: NXP SEMICONDUCTORS
元件分類: 門電路
英文描述: LVT SERIES, DUAL 4-INPUT NAND GATE, PDSO14
封裝: 4.40 MM, PLASTIC, MO-153, SOT-402-1, TSSOP-14
文件頁數(shù): 6/13頁
文件大小: 145K
代理商: 935209210112
Philips Semiconductors
Product specification
74LVT20
3.3V Dual 4-input NAND gate
2
1996 Aug 28
853-1871 17244
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
Tamb = 25°C;
GND = 0V
TYPICAL
UNIT
tPLH
tPHL
Propagation
delay
An, Bn, Cn, Dn
to Yn
CL = 50pF;
VCC = 3.3V
3.4
3.2
ns
CIN
Input
capacitance
VI = 0V or 3.0V
3
pF
ICCL
Total supply
current
Outputs Low;
VCC = 3.6V
0.5
mA
PIN CONFIGURATION
14
13
12
11
10
9
8
7
6
5
4
3
2
1
GND
VCC
B1
A1
Y1
NC
D1
C1
A0
B0
Y0
NC
C0
D0
SA00350
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
NAME AND FUNCTION
1, 2, 4, 5, 9,
10, 12, 13
An, Bn,
Cn, Dn
Data inputs
6, 8
Yn
Data outputs
7
GND
Ground (0V)
14
VCC
Positive supply voltage
LOGIC SYMBOL
D0
A1
B1
A0
B0
C0
C1
D1
Y0
Y1
6
8
1
2
4
5
9
10
12
13
VCC = Pin 14
GND = Pin 7
SA00351
LOGIC DIAGRAM
VCC = Pin 14
GND = Pin 7
SA00352
Y0
6
1
2
4
A0
B0
C0
5
D0
Y1
8
9
10
12
A1
B1
C1
13
D1
LOGIC SYMBOL (IEEE/IEC)
SF00068
&
6
8
1
2
4
5
9
10
12
13
FUNCTION TABLE
INPUTS
OUTPUT
Dna
Dnb
Dnc
Dnd
Qn
L
X
H
X
L
X
H
X
L
X
H
X
L
H
L
NOTES:
H = High voltage level
L
= Low voltage level
X = Don’t care
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
14-Pin Plastic SO
–40
°C to +85°C
74LVT20 D
SOT108-1
14-Pin Plastic SSOP
–40
°C to +85°C
74LVT20 DB
SOT337-1
14-Pin Plastic TSSOP
–40
°C to +85°C
74LVT20 PW
74LVT20PW DH
SOT402-1
相關(guān)PDF資料
PDF描述
935209440112 LVT SERIES, DUAL 4-INPUT NAND GATE, PDSO14
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935209440118 LVT SERIES, DUAL 4-INPUT NAND GATE, PDSO14
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