參數(shù)資料
型號(hào)： 935210280118
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 諧振器
英文描述： LV/LV-A/LVX/H SERIES, DUAL MONOSTABLE MULTIVIBRATOR, PDSO16
封裝： 4.40 MM, PLASTIC, MO-153, SOT-403-1, TSSOP1-16
文件頁(yè)數(shù)： 12/20頁(yè)
文件大?。?/td> 259K
代理商： 935210280118
Philips Semiconductors
Product data
74LV123
Dual retriggerable monostable multivibrator
with reset
2
2003 Mar 13
FEATURES
Optimized for Low Voltage applications: 1.0 V to 5.5 V
Accepts TTL input levels between V
CC = 2.7 V and VCC = 3.6 V
Typical V
OLP (output ground bounce) < 0.8 V @ VCC = 3.3 V,
Tamb = 25 °C
Typical V
OHV (output VOH undershoot) > 2 V @ VCC = 3.3 V,
Tamb = 25 °C
DC triggered from active HIGH or active LOW inputs
Retriggerable for very long pulses up to 100% duty factor
Direct reset terminates output pulses
Schmitt-trigger action on all inputs except for the reset input
Output capability: standard (except for nR
EXT/CEXT)
I
CC category: MSI
DESCRIPTION
The 74LV123 is a low-voltage Si-gate CMOS device and is pin and
function compatible with the 74HC/HCT123.
The 74LV123 is a dual retriggerable monostable multivibrator with
output pulse width control by three methods. The basic pulse time is
programmed by selection of an external resistor (REXT) and
capacitor (CEXT). They are normally connected as shown in
Figure 1. Once triggered, the basic output pulse width may be
extended by retriggering the gated active LOW-going edge input
(nA) or the active HIGH-going edge input (nB). By repeating this
process, the output pulse period (nQ = HIGH, nQ = LOW) can be
made as long as desired. Alternatively, an output delay can be
terminated at any time by a LOW-going edge on input nRD, which
also inhibits the triggering. Figures 1 and 2 illustrate pulse control by
retriggering and early reset. The basic output pulse width is essentially
determined by the values of the external timing components REXT
and CEXT. For pulse width when CEXT < 10000 pF, see Figure 5.
When CEXT > 10,000 pF, the typical output pulse width is defined
as:
tW = 0.45 × REXT × CEXT (typ.), where tW = pulse width in ns;
REXT = external resistor in k; and CEXT = external capacitor in pF.
Schmitt-trigger action in the nA and nB inputs makes the circuit
highly tolerant of slower input rise and fall times.
QUICK REFERENCE DATA
GND = 0V; Tamb = 25°C; tr = tf v2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
tPHL/tPLH
Propagation delay
nA, nB to nQ, nQ
nRD to nQ, nQ
CL = 15 pF
VCC = 3.3 V
REXT = 5 k
CEXT = 0 pF
25
20
ns
CI
Input capacitance
3.5
pF
CPD
Power dissipation capacitance per monost-
able
VCC = 3.3V, VI = GND to VCC1
60
pF
NOTES:
1. CPD is used to determine the dynamic power dissipation (PD in W)
PD = CPD × VCC2 × fi × N + Σ (CL × VCC2 × fo) where:
N = number of outputs switching;
fi = input frequency in MHz; CL = output load capacitance in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
Σ (CL × VCC2 × fo) = sum of the outputs.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
ORDER CODE
PKG. DWG. #
16-Pin Plastic DIL
–40
°C to +125°C
74LV123N
SOT38-1
16-Pin Plastic SO
–40
°C to +125°C
74LV123D
SOT109-1
16-Pin Plastic SSOP Type II
–40
°C to +125°C
74LV123DB
SOT338-1
16-Pin Plastic TSSOP Type I
–40
°C to +125°C
74LV123PW
SOT403-1
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