參數(shù)資料
型號(hào): 935223080112
廠商: NXP SEMICONDUCTORS
元件分類: Buffer和線驅(qū)動(dòng)
英文描述: 13 LINE TRANSCEIVER, PDSO48
封裝: 6.10 MM, PLASTIC, MO-153ED, SOT362-1, TSSOP-48
文件頁數(shù): 12/12頁
文件大?。?/td> 113K
代理商: 935223080112
Philips Semiconductors
Product specification
PDI1284P11
3.3V Parallel interface transceiver/buffer
1999 Sep 17
9
TEST CIRCUITS AND WAVEFORMS
PULSE
GENERATOR
RT
VIN
D.U.T.
VOUT
50pF
VCC
Test Circuit for Bn or Yn Outputs
GND
V=2.8V
RL = 500 tPLH/PHL
= 62
for SR test
PULSE
GENERATOR
RT
VIN
D.U.T
VOUT
RL
VCC
Test Circuit for An Outputs
VM
NEGATIVE
PULSE
90%
tW
POSITIVE
PULSE
10%
VM = 1.5V
Input Pulse Definition
PDI1284
SV001741
S1
CL
tW
10%
tTHL (tf)
tTLH (tr)
90%
VM
10%
VM
90%
tTHL (tf)
tTLH (tr)
AMP (V)
0V
AMP (V)
0V
VM
10%
90%
SWITCH POSITION
Bn or Yn Outputs
TEST
SWITCH
tPLH
GND
tPHL
V=2.8V
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value.
CL = Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
INPUT PULSE REQUIREMENTS
FAMILY
Amplitude
Rep. Rate
tW
tr
tf
3.0V
1MHz
500ns
3ns
Waveform 5.
PULSE
GENERATOR
VI
RT
D.U.T.
VO
CL
50pF
S1
2 x VCC
Open
GND
500
500
VCC
VI
t 2.7V
VCC
2.7V – 3.6V
2.7V
Test
S1
GND
tPLZ/tPZL
2 x VCC
tPHZ/tPZH
tPLH/tPHL
Open
SY00003
VCC
Figure 1. Load Circuitry for Bn to An Switching Times
D.U.T.
VCC
IO
VCC/2
IO is measured by forcing VCC/2 on the output. RD can then
be calculated using the equation RD = VCC/2 IO .
SY00005
Figure 2. Output Impedance RD
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