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| 型號： | 935225400512 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 6/67頁 |
| 文件大小： | 400K |
| 代理商： | 935225400512 |
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1998 Apr 07
14
Philips Semiconductors
Product specication
8-bit Flash microcontrollers
P89C738; P89C739
7
FUNCTIONAL DESCRIPTION
This chapter gives a brief overview of the device.
Detailed functional descriptions are given in the following
chapters:
Chapter 8 “Memory organization”
Chapter 9 “Interrupt system”
Chapter 10 “Timers/counters”
Chapter 11 “I/O facilities”
Chapter 12 “Full duplex Serial Port (UART)”
Chapter 13 “Reduced power modes”
Chapter 14 “Oscillator circuit”
Chapter 15 “Reset”
Chapter 16 “Multiple Programming ROM (MTP-ROM)”.
7.1
General
The P89C738 is a stand-alone high-performance
microcontroller designed for use in real time applications
such as instrumentation, industrial control and medium to
high-end consumer applications.
In addition to the 80C51 standard functions, the device
provides a number of dedicated hardware functions for
these applications. The P89C738 is a control-oriented
CPU with on-chip Program and data memory. It can
execute programs with internal or external program
memory up to 64 kbytes. It can also access up to
64 kbytes of external data memory. For systems requiring
extra capability, the P89C738 can be expanded using
standard memories and peripherals.
The P89C738 has two software selectable modes of
reduced activity for further power reduction: Idle and
Power-down. The Idle mode freezes the CPU while
allowing the RAM, timers, serial ports and interrupt system
to continue functioning. The Power-down mode saves the
RAM contents but freezes the oscillator causing all other
chip functions to be inoperative except the Watchdog
Timer if it is enabled. The Power-down mode can be
terminated by an external reset, a Watchdog Timer
overflow and in addition, by either of the two external
interrupts.
7.2
Instruction set execution
The P89C738 uses the powerful instruction set of the
80C51. Additional Special Function Registers (SFRs) are
incorporated to control the on-chip peripherals.
The instruction set consists of 49 single-byte, 46 two-byte
and 16 three-byte instructions. When using a 16 MHz
oscillator, 64 instructions execute in 750 ns and
45 instructions execute in 1.5
s. Multiply and divide
instructions execute in 3
s (see Chapter 18).
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