參數(shù)資料
型號(hào)： 935233970518
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 噪聲抑制
英文描述： B Type, DOLBY NOISE REDUCTION IC, PDSO32
封裝： 7.50 MM, PLASTIC, SOT-287-1, SOP-32
文件頁(yè)數(shù)： 4/31頁(yè)
文件大?。?/td> 228K
代理商： 935233970518
1998 Mar 13
12
Philips Semiconductors
Product specication
Dolby* Pro Logic Surround;
Incredible Sound
SAA7710T
Fig.10 Acknowledge on the I2C-bus.
handbook, full pagewidth
MLC163
data output
from receiver
SCL from
master
S
START condition
12
7
8
9
clock pulse for
acknowledgement
acknowledge
not acknowledge
data output
from transmitter
I2C-BUS FORMAT
Addressing
Before any data is transmitted on the I2C-bus, the device
which should respond is addressed first. The addressing is
always done with the first byte transmitted after the START
procedure.
Slave address (pin A0)
The chip acts as a slave receiver or a slave transmitter.
Therefore the clock signal SCL is only an input signal.
The data signal SDA is a bidirectional line. The chip slave
address is shown in Table 2.
The sub address bit A0 corresponds to the hardware
address pin A0 which allows the device to have 1 of 2
different addresses.
Write cycles
The I2C-bus configuration for a write cycle is shown in
Fig 12. The write cycle is used to write in the input selector
control register and to initialise or update coefficient
values.
The data length is 2 bytes or 3 bytes depending of the
accessed memory. If the Y-memory is addressed the data
length is 2 bytes, in case of the X-memory the length is
3 bytes. The slave receiver detects the address and
adjusts the bytes accordingly.
Read cycles
The I2C-bus configuration for a Read cycle is shown in
Fig 13. The read cycle is used to read data values from
XRAM or YRAM.
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