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參數(shù)資料
| 型號： | 935238450512 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVC/LCX/Z SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | 6.10 MM, PLASTIC, MO-153, SOT362-1, TSSOP-48 |
| 文件頁數(shù)： | 11/24頁 |
| 文件大?。?/td> | 261K |
| 代理商： | 935238450512 |
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The 74LVC(H)16244A is a high-performance, low power, low voltage, Si-gate CMOS device, superior to most advanced CMOS
compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 Volt. These features allow the use of these devices as a mixed 3.3
and 5 V environment.
The 74LVC(H)16244A is a 16-bit non-inverting buffer/line driver with 3-state outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The device features
four Output Enables (1OE, 2OE, 3OE and 4OE), each controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state.
The 74LVC(H)16244A is identical to the 74LVC16240A but has non-inverting outputs.
The 74LVCH16244A bushold data inputs eliminates the need for external pull-up resistors to hold unused inputs.
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 to 3.6 V
CMOS low power consumption
MULTIBYTETM flow-through standard pin-out architecture
Low inductance multiple power and ground pins for minimum noise and ground bounce
Direct interface with TTL levels
All data inputs have bushold (74LVCH16244A only).
Complies with JEDEC standard no. 8-1A
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
Specified from -40 to +85 Cel and -40 to +125 Cel.
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74LVC16244A;
74LVCH16244A
(Product Specification)
08-Dec-03, 18 Pages,
117kB
74LVC16244A; 74LVCH16244A - 16-bit buffer/line driver; 5 V
input/output tolerant; 3-state
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74LVC16244A; 74LVCH16244A - 16-bit buffer/line driver; 5 V input/output tolerant; 3-state from NXP Semiconductors
20-Nov-2009
http://www.nxp.com/
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