Philips Semiconductors
Product specification
74LVC162244A/
74LVCH162244A
16-bit buffer/line driver; with 30
series termination
resistors; 5V input/output tolerant (3-State)
1998 Feb 17
5
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40
°C to +85°C
UNIT
MIN
TYP1
MAX
V
HIGH level Input voltage
VCC = 1.2V
VCC
V
VIH
HIGH level Input voltage
VCC = 2.7 to 3.6V
2.0
V
LOW level Input voltage
VCC = 1.2V
GND
V
VIL
LOW level Input voltage
VCC = 2.7 to 3.6V
0.8
V
VCC = 2.7V; VI = VIH or VIL;IO = –6mA
VCC*0.5
VOH
HIGH level output voltage
VCC = 3.0V; VI = VIH or VIL;IO = –100A
VCC*0.2
VCC
V
VCC = 3.0V; VI = VIH or VIL; IO = 12mA
VCC*0.8
VCC = 2.7V; VI = VIH or VIL;IO = 6mA
0.40
VOL
LOW level output voltage
VCC = 3.0V; VI = VIH or VIL;IO = 100A
0.20
V
VCC = 3.0V; VI = VIH or VIL; IO = 12mA
0.55
I
Input leakage current
VCC =3 6V; V = 5 5V or GND6
"01
"5
A
II
Input leakage current
VCC = 3.6V; VI = 5.5V or GND6
"0.1
"5
A
IOZ
3-State output OFF-state current
VCC = 3.6V; VI = VIH or VIL;VO = 5.5V or GND
0.1
"5
A
Ioff
Power off leakage supply
VCC = 0.0V; VI or VO = 5.5V
0.1
"10
A
ICC
Quiescent supply current
VCC = 3.6V; VI = VCC or GND; IO = 0
0.1
20
A
ICC
Additional quiescent supply current
per control pin
VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0
5
500
A
ICC
Additional quiescent supply current
per data input pin
VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0
150
750
A
IBHL
Bus hold LOW sustaining current
VCC = 3.0V; VI = 0.8V2, 3, 4
75
A
IBHH
Bus hold HIGH sustaining current
VCC = 3.0V; VI = 2.0V2, 3, 4
–75
A
IBHLO
Bus hold LOW overdrive current
VCC = 3.6V2, 3 5
450
A
IBHHO
Bus hold HIGH overdrive current
VCC = 3.6V2, 3, 5
–450
A
NOTES:
1. All typical values are at VCC = 3.3V and Tamb = 25°C.
2. Valid for data inputs of bus hold parts (LVCH16-A) only.
3. For data inputs only, control inputs do not have a bus hold circuit.
4. The specified sustaining current at the data input holds the input below the specified VI level.
5. The specified overdrive current at the data input forces the data input to the opposite logic input state.
6. For bus hold parts, the bus hold circuit is switched off when Vi exceeds VCC allowing 5.5V on the input terminal.