1999 Aug 05
7
Philips Semiconductors
Product specication
16-bit D-type transparent latch with 30
series
termination resistors; 5 V input/output tolerant; 3-state
74LVC162373A;
74LVCH162373A
DC CHARACTERISTICS
Over recommended operating conditions; voltage are referenced to GND (ground=0V).
Notes
1. All typical values are at VCC = 3.3 V and Tamb =25 °C.
2. For bus hold parts, the bus hold circuit is switched off when VI exceeds VCC allowing 5.5 V on the input terminal.
3. Valid for data inputs of bus hold parts (LVCH162373-A) only.
4. For data inputs only, control inputs do not have a bus hold circuit.
5. The specified sustaining current at the data input holds the input below the specified VI level.
6. The specified overdrive current at the data input forces the data input to the opposite logic input state.
SYMBOL
PARAMETER
TEST CONDITIONS
Tamb (°C)
UNIT
OTHER
VCC (V)
40 to +85
MIN.
TYP.(1)
MAX.
VIH
HIGH-level input voltage
1.2
VCC
V
2.7 to 3.6 2.0
VIL
LOW-level input voltage
1.2
GND
V
2.7 to 3.6
0.8
VOH
HIGH-level output voltage VI =VIH or VIL; IO = 6 mA
2.7
VCC 0.5
V
VI =VIH or VIL;
IO = 100 A
3.0
VCC 0.2
VCC
VI =VIH or VIL; IO = 12 mA 3.0
VCC 0.8
VOL
LOW-level output voltage
VI =VIH or VIL; IO =6mA
2.7
0.40
V
VI =VIH or VIL; IO = 100 A
3.0
0.20
VI =VIH or VIL; IO =12mA
3.0
0.55
II
input leakage current
VI = 5.5 V or GND; note 2
3.6
±0.1
±5
A
IOZ
3-state output OFF-state
current
VI =VIH or VIL;
VO = 5.5 V or GND
3.6
0.1
±5
A
Ioff
power off leakage supply
VI or VO = 5.5 V
0.0
0.1
±10
A
ICC
quiescent supply current
VI =VCC or GND; IO = 0
3.6
0.1
20
A
I
CC
additional quiescent
supply current per control
pin
VI =VCC 0.6 V; IO = 0
2.7 to 3.6
5
500
A
IBHL
bus hold LOW sustaining
current
VI = 0.8 V; notes 3, 4 and 5
3.0
75
A
IBHH
bus hold HIGH sustaining
current
VI = 2.0 V; notes 3, 4 and 5
3.0
75
A
IBHLO
bus hold LOW overdrive
current
VI = 0.8 V; notes 3, 4 and 6
3.6
500
A
IBHHO
bus hold HIGH overdrive
current
VI = 0.8 V; notes 3, 4 and 6
3.6
500
A