Philips Semiconductors
Product specification
74ABT534A
Octal D-type flip-flop, inverting (3-State)
2
1997 Feb 03
853-1910 17722
FEATURES
8-bit positive edge triggered register
3-State output buffers
Output capability: +64mA/–32mA
Latch-up protection exceeds 500mA per Jedec JC40.2 Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
Power-up 3-State
DESCRIPTION
The 74ABT534A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT534A is an 8-bit, edge triggered register coupled to eight
3-State output buffers. The two sections of the device are controlled
independently by the clock (CP) and Output Enable (OE) control
gates.
The register is fully edge triggered. The state of each D input, one
set-up time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s output.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active-Low Output Enable (OE) controls all eight 3-State buffers
independent of the clock operation.
When OE is Low, the stored data appears at the outputs. When OE
is High, the outputs are in the High-impedance “OFF” state, which
means they will neither drive nor load the bus.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
Tamb = 25°C; GND = 0V
TYPICAL
UNIT
tPLH
tPHL
Propagation delay
CP to Qn
CL = 50pF; VCC = 5V
3.3
3.6
ns
CIN
Input capacitance
VI = 0V or VCC
3.5
pF
COUT
Output capacitance
Outputs disabled; VO = 0V or VCC
6.5
pF
ICCZ
Total supply current
Outputs disabled; VCC =5.5V
100
A
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
20-Pin Plastic DIP
–40
°C to +85°C
74ABT534A N
SOT146-1
20-Pin plastic SO
–40
°C to +85°C
74ABT534A D
SOT163-1
20-Pin Plastic SSOP Type II
–40
°C to +85°C
74ABT534A DB
SOT339-1
20-Pin Plastic TSSOP Type I
–40
°C to +85°C
74ABT534A PW
74ABT534APW DH
SOT360-1
PIN CONFIGURATION
20
19
18
17
16
15
14
13
12
10
11
9
8
7
6
5
4
3
2
1
VCC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
OE
SA00161
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
1
OE
Output enable input (active-Low)
3, 4, 7, 8,
13, 14, 17, 18
D0-D7
Data inputs
2, 5, 6, 9,
12, 15, 16, 19
Q0-Q7
Inverting 3-State outputs
11
CP
Clock pulse input
(active rising edge)
10
GND
Ground (0V)
20
VCC
Positive supply voltage