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參數(shù)資料
| 型號： | 935241920118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ABT SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20 |
| 封裝： | 7.50 MM, PLASTIC, SOT-163-1, MS-013AC, SO-20 |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 122K |
| 代理商： | 935241920118 |
Philips Semiconductors
Product specification
74ABT534A
Octal D-type flip-flop, inverting (3-State)
1997 Feb 03
6
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
Tamb = +25oC
VCC = +5.0V
Tamb = -40 to
+85oC
VCC = +5.0V ±0.5V
UNIT
Min
Typ
Min
ts(H)
ts(L)
Setup time, High or Low
Dn to CP
2
1.0 1
0.4
0.3
1.0 1
ns
th(H)
th(L)
Hold time, High or Low
Dn to CP
2
0.5
–0.3
–0.4
0.5
ns
tw(H)
tw(L)
CP pulse width
High or Low
1
1.5 1
2.0 1
0.8
1.0
1.5 1
2.0 1
ns
NOTE:
1. This datasheet limit may vary among suppliers.
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
tw(H)
VM
1/fMAX
tPLH
tPHL
CP
Qn
tw(L)
SA00165
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
VM
Dn
VM
CP
ts(H)
th(H)
ts(L)
th(L)
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
SA00107
Waveform 2. Data Setup and Hold Times
OE
VM
tPZH
tPHZ
0V
VOH –0.3V
Qn
VM
SA00166
Waveform 3. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
OE
tPZL
tPLZ
VOL +0.3V
Qn
VM
SA00167
Waveform 4. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
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