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參數(shù)資料
| 型號： | 935249990118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 門電路 |
| 英文描述： | LVC/LCX/Z SERIES, QUAD 2-INPUT NOR GATE, PDSO14 |
| 封裝： | 3.90 MM, PLASTIC, MS-012, SOT-108-1, SO-14 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 83K |
| 代理商： | 935249990118 |
2002 Mar 05
2
Philips Semiconductors
Product specication
Quad 2-input NOR gate
74LVC02A
FEATURES
5 V tolerant inputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
Inputs accept voltages up to 5.5 V
Complies with JEDEC standard no. 8-1A
Specified from 40 to +85 °C and 40 to +125 °C.
DESCRIPTION
The 74LVC02A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 or 5 V devices. This
feature allows the use of these devices as translators in
a mixed 3.3 and 5 V environment.
The 74LVC02A provides the 2-input NOR function.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25 °C; tr =tf ≤ 2.5 ns.
Notes
1. CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD × VCC2 × fi + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
Σ(CL × VCC2 × fo) = sum of the outputs.
2. The condition is VI = GND to VCC.
ORDERING INFORMATION
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
tPHL/tPLH
propagation delay nA, nB to nY
CL = 50 pF; VCC = 3.3 V
2.1
ns
CI
input capacitance
4.0
pF
CPD
power dissipation capacitance per gate
VCC = 3.3 V;
notes 1 and 2
10
pF
TYPE NUMBER
PACKAGES
TEMPERATURE RANGE
PINS
PACKAGE
MATERIAL
CODE
74LVC02AD
40 to +125 °C
14
SO
plastic
SOT108-1
74LVC02ADB
40 to +125 °C
14
SSOP
plastic
SOT337-1
74LVC02APW
40 to +125 °C
14
TSSOP
plastic
SOT402-1
相關(guān)PDF資料 |
PDF描述 |
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| 935250000112 | LVC/LCX/Z SERIES, QUAD 2-INPUT NOR GATE, PDSO14 |
| 935250010118 | LVC/LCX/Z SERIES, QUAD 2-INPUT NOR GATE, PDSO14 |
| 935250000118 | LVC/LCX/Z SERIES, QUAD 2-INPUT NOR GATE, PDSO14 |
| 935250010112 | LVC/LCX/Z SERIES, QUAD 2-INPUT NOR GATE, PDSO14 |
| 935250070118 | LVC/LCX/Z SERIES, QUAD 2-INPUT OR GATE, PDSO14 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| 9-3525-012 | 制造商:KEYSTONE 功能描述:MODIFIED 3525,VERSION E |
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| 935257650112 | 制造商:NXP Semiconductors 功能描述:SUB ONLY ICSUBS TO 935257650112 |
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