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參數(shù)資料
| 型號： | 935254370112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVC/VCX/A SERIES, 16 1-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | PLASTIC, TSSOP2-56 |
| 文件頁數(shù)： | 4/14頁 |
| 文件大?。?/td> | 352K |
| 代理商： | 935254370112 |
Description
The 74ALVCH162827 high-performance CMOS device combines low static and dynamic power dissipation with high speed and
high output drive.
The 74ALVCH162827 20-bit buffers provide high performance bus interface buffering for wide data/address paths or buses
carrying parity. They have NAND Output Enables (nOE1nOE2) for maximum control flexibility.
The 74ALVCH162827 is designed with 30
series resistance in both the pull-up and pull-down output structures. This design
reduces line noise in applications such as memory address drivers, clock drivers and bus receivers/transmitters.
To ensure the high impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
Features
Complies with JEDEC standard no. 8-1A.
q
CMOS low power consumption
q
Direct interface with TTL levels
q
Current drive ± 12 mA at 3.0 V
q
MULTIBYTETM flow-through standard pin-out architecture
q
Low inductance multiple VCC and GND pins for minimum noise and ground bounce
q
Integrated 30
termination resistors
q
Applications
File
Ground And VCC Bounce Of High-Speed Integrated Circuits (date 01-Jan-93)
File
File
Live Insertion Aspects of Philips Logic Families (date 22-Jul-99)
PDF
File
Hardware and software verification procedure (date 07-Oct-98)
Philips Semiconductors; 74ALVCH162827; 20-bit buffer/line driver, non-inverting, with 30 W termination resistors (3-State)
file:///G|/imaging/BITTING/mail_pdf/cpl_rework/74alvch162827dgg.html (2 of 4) [1/9/2002 11:45:55 AM]
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