1998 May 15
64
Philips Semiconductors
Product specication
Enhanced Video Input Processor (EVIP)
SAA7111A
Table 41 I2C-bus start set-up values
Note
1. All X values must be set to LOW.
SUB
(HEX)
FUNCTION
NAME(1)
VALUES (BIN)
(HEX)
76543210START
00
chip version
ID07 to ID00; see Table 9
read only
01
reserved
0
00
02
analog input control 1
FUSE1 and FUSE0, GUDL2 to GUDL0,
MODE2 to MODE0
11000000
C0
03
analog input control 2
X, HLNRS, VBSL, WPOFF, HOLDG,
GAFIX, GAI28 and GAI18
00100011
33
04
analog input control 3
GAI17 to GAI10
0
00
05
analog input control 4
GAI27 to GAI20
0
00
06
horizontal sync start
HSB7 to HSB0
1
0
1
0
1
EB
07
horizontal sync stop
HSS7 to HSS0
1
0
E0
08
sync control
AUFD, FSEL, EXFIL, X, VTRC, HPLL,
VNOI1 and VNOI0
10001000
88
09
luminance control
BYPS, PREF, BPSS1 and BPSS0, VBLB,
UPTCV, APER1 and APER0
00000001
01
0A
luminance brightness
BRIG7 to BRIG0
1
0
80
0B
luminance contrast
CONT7 to CONT0
0
1
0
1
47
0C
chrominance saturation SATN7 to SATN0
0
1
0
40
0D
chroma hue control
HUEC7 to HUEC0
0
00
0E
chrominance control
CDTO, CSTD2 to CSTD0, DCCF, FCTC,
CHBW1 and CHBW0
00000001
01
0F
reserved
0
00
10
format/delay control
OFTS1 and OFTS0, HDEL1 and HDEL0,
VRLN, YDEL2 to YDEL0
01000000
40
11
output control 1
GPSW, CM99, FECO, COMPO, OEYC,
OEHV, VIPB, and COLO
00011100
1C
12
output control 2
RTSE1 and RTSE0, TCLO, CBR,
RGB888 DIT, AOSL1 and AOSL0
00000001
00
13
output control 3
CCTR1 and CCTR0, BCHI1 and BCHI0,
BCLO1 and BCLO0, VCTR1 and VCTR0
00000000
00
14
reserved
0
00
15
VBI-data stream start
VSTA7 to VSTA0
0
00
16
VBI-data stream stop
VSTO7 to VSTO0
0
00
17
MSBs for VBI control
X, X, X, X, X, X, VSTO8, and VSTA8
0
00
18-19
reserved
0
00
1A
text slicer status
0, 0, 0, 0, F2VAL, F2RDY,
F1VAL, and F1RDY
read only register
1B
decoded bytes of the
text slicer
P1, BYTE1 (6 to 0)
1C
P2, BYTE2 (6 to 0)
1D-1E reserved
0
00
1F
status byte
STTC, HLCK, FIDT, GLIMT, GLIMB,
WIPA, SLTCA and CODE
read only register